Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2019065355) SUCTION-ATTACHMENT STAGE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/065355 International Application No.: PCT/JP2018/034388
Publication Date: 04.04.2019 International Filing Date: 18.09.2018
IPC:
H01L 21/683 (2006.01) ,H01L 21/52 (2006.01) ,H01L 21/60 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67
Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683
for supporting or gripping
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
52
Mounting semiconductor bodies in containers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
Applicants:
株式会社新川 SHINKAWA LTD. [JP/JP]; 東京都武蔵村山市伊奈平2丁目51番地の1 51-1, Inadaira 2-chome, Musashimurayama-shi, Tokyo 2088585, JP
Inventors:
小林 泰人 KOBAYASHI, Taito; JP
馬詰 邦彦 MAZUME, Kunihiko; JP
Agent:
特許業務法人YKI国際特許事務所 YKI INTELLECTUAL PROPERTY ATTORNEYS; 東京都武蔵野市吉祥寺本町一丁目34番12号 1-34-12, Kichijoji-Honcho, Musashino-shi, Tokyo 1800004, JP
Priority Data:
2017-18863528.09.2017JP
Title (EN) SUCTION-ATTACHMENT STAGE
(FR) ÉTAGE DE FIXATION PAR ASPIRATION
(JA) 吸着ステージ
Abstract:
(EN) This suction-attachment stage (20) comprises: an upper plate (21) having a plurality of suction-attachment holes (22); first to third vacuum flow passageways(41 to 43) which respectively connect the plurality of suction-attachment holes (22) in the upper plate (21) to a vacuum device (45) for a plurality of groups A1 to A3 corresponding to the size of a semiconductor die; and first and second check valves (61, 62) respectively disposed in the second and third vacuum flow passageways (42, 43). The first and second check valves (61, 62) close when the suction-attachment holes (22) are opened to the atmosphere, and open when the suction-attachment holes (22) are blocked by a semiconductor die.
(FR) La présente invention concerne un étage de fixation par aspiration (20) qui comprend : une plaque supérieure (21) ayant une pluralité de trous (22) de fixation par aspiration ; un premier à un troisième passage d’écoulement (41 à 43) à vide qui raccordent respectivement la pluralité de trous (22) de fixation par aspiration dans la plaque supérieure (21) à un dispositif à vide (45) pour une pluralité de groupes (A1 à A3) correspondant à la taille d’une puce semi-conductrice ; et de première et deuxième vannes de contrôle (61, 62) disposées respectivement dans les deuxième et troisième passages d’écoulement (42, 43) à vide. Les première et deuxième vannes de contrôle (61, 62) se ferment lorsque les trous (22) de fixation par aspiration sont ouverts à l’atmosphère, et s’ouvrent lorsque les trous (22) de fixation par aspiration sont bloqués par une puce semi-conductrice.
(JA) 吸着ステージ(20)は、複数の吸着孔(22)が設けられた上板(21)と、上板(21)に設けられた複数の吸着孔(22)を半導体ダイのサイズに応じた複数のグループA1~A3毎に真空装置(45)に接続する第1~第3真空流路(41~43)と、第2、第3真空流路(42,43)に設けられた第1、第2逆止弁(61,62)を含み、第1、第2逆止弁(61,62)は、吸着孔(22)が大気開放されている場合に閉となり、半導体ダイによって吸着孔(22)が塞がれると開となる。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)