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1. (WO2019064744) DISPLAY DEVICE
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Pub. No.: WO/2019/064744 International Application No.: PCT/JP2018/023622
Publication Date: 04.04.2019 International Filing Date: 21.06.2018
IPC:
G09F 9/30 (2006.01) ,H01L 21/336 (2006.01) ,H01L 27/32 (2006.01) ,H01L 29/786 (2006.01) ,H01L 51/50 (2006.01) ,H05B 33/02 (2006.01)
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
F
DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9
Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30
in which the desired character or characters are formed by combining individual elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
28
including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
32
with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
50
specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
02
Details
Applicants:
株式会社ジャパンディスプレイ JAPAN DISPLAY INC. [JP/JP]; 東京都港区西新橋三丁目7番1号 3-7-1 Nishi-shinbashi, Minato-ku, Tokyo 1050003, JP
Inventors:
神谷 哲仙 KAMIYA Akinori; JP
Agent:
特許業務法人高橋・林アンドパートナーズ TAKAHASHI, HAYASHI AND PARTNER PATENT ATTORNEYS, INC.; 東京都大田区蒲田5-24-2 損保ジャパン日本興亜蒲田ビル9階 Sonpo Japan Nipponkoa Kamata Building 9F, 5-24-2 Kamata, Ota-ku, Tokyo 1440052, JP
Priority Data:
2017-18847328.09.2017JP
Title (EN) DISPLAY DEVICE
(FR) DISPOSITIF D'AFFICHAGE
(JA) 表示装置
Abstract:
(EN) This display device is provided with: a substrate having a display region; and a plurality of pixels arrayed in the display region of the substrate. Each of the pixels includes a light emitting element, first transistor, second transistor, first insulating layer, and second insulating layer. The first transistor has a silicon layer, the second transistor has an oxide semiconductor layer that is disposed above the first insulating layer, and the first insulating layer includes a silicon oxide layer. Over the display region, the first insulating layer is disposed in common to the pixels, said first insulating layer being between the silicon layer and the oxide semiconductor layer, the second insulating layer includes diamond-like carbon, and the second insulating layer is disposed between the first insulating layer and a channel region of the second transistor.
(FR) L’invention concerne un dispositif d'affichage comprenant : un substrat possédant une zone d'affichage ; et une pluralité de pixels disposés en réseau dans la zone d'affichage du substrat. Chacun des pixels comprend un élément électroluminescent, un premier transistor, un second transistor, une première couche isolante et une seconde couche isolante. Le premier transistor possède une couche de silicium, le second transistor possède une couche semi-conductrice d'oxyde disposée au-dessus de la première couche isolante, et la première couche isolante comprend une couche d'oxyde de silicium. Sur la zone d'affichage, la première couche isolante est disposée en commun aux pixels, ladite première couche isolante étant située entre la couche de silicium et la couche semi-conductrice d'oxyde, la seconde couche isolante comprend du carbone de type diamant, et la seconde couche isolante est disposée entre la première couche isolante et une zone de canal du second transistor.
(JA) 表示装置は、表示領域を有する基板と、基板の表示領域に配列された複数の画素と、を備え、複数の画素の各々は、発光素子、第1トランジスタ、第2トランジスタ、第1絶縁層、及び第2絶縁層を含み、第1トランジスタは、シリコン層を有し、第2トランジスタは、第1絶縁層よりも上層に配置された酸化物半導体層を有し、第1絶縁層は、酸化シリコン層を含み、第1絶縁層は、シリコン層と、酸化物半導体層との間に、複数の画素に共通して表示領域に亘って配置され、第2絶縁層は、ダイヤモンドライクカーボンを含み、第2絶縁層は、第2トランジスタのチャネル領域と、第1絶縁層との間に配置される。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)