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1. (WO2019064369) ENCODER DEVICE, TRANSMITTER, DECODER DEVICE, AND RECEIVER
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Pub. No.: WO/2019/064369 International Application No.: PCT/JP2017/034928
Publication Date: 04.04.2019 International Filing Date: 27.09.2017
IPC:
H03M 13/29 (2006.01) ,H03M 13/15 (2006.01) ,H03M 13/19 (2006.01)
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
M
CODING, DECODING OR CODE CONVERSION, IN GENERAL
13
Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
29
combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
M
CODING, DECODING OR CODE CONVERSION, IN GENERAL
13
Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03
Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05
using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
13
Linear codes
15
Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem (BCH) codes
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
M
CODING, DECODING OR CODE CONVERSION, IN GENERAL
13
Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
03
Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
05
using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
13
Linear codes
19
Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
Applicants:
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors:
吉田 英夫 YOSHIDA, Hideo; JP
平栗 慎也 HIRAKURI, Shinya; JP
久世 俊之 KUZE, Toshiyuki; JP
Agent:
溝井国際特許業務法人 MIZOI INTERNATIONAL PATENT FIRM; 神奈川県鎌倉市大船二丁目17番10号3階 3rd floor, 17-10, Ofuna 2-chome, Kamakura-shi, Kanagawa 2470056, JP
Priority Data:
Title (EN) ENCODER DEVICE, TRANSMITTER, DECODER DEVICE, AND RECEIVER
(FR) DISPOSITIF CODEUR, ÉMETTEUR, DISPOSITIF DÉCODEUR ET RÉCEPTEUR
(JA) 符号化装置、送信機、復号装置および受信機
Abstract:
(EN) Provided is an encoder device (20) in which a first encoding unit (21) encodes, using an RS code, each of first data sequences existing in a direction different from the row direction of input data, thereby generating an RS code parity, and adds the RS code parity to each of the first data sequences, thereby generating encoded data, and consequently expanding a matrix. A second encoding unit (22) encodes, using a BCH code and an LDPC code, each of second data sequences existing in the row direction of the encoded data, thereby generating BCH code and LDPC code parities, and generates a plurality of DVB-S2 frames (13) each including one data sequence existing in the row direction of the encoded data and the corresponding BCH code and LDPC code parities.
(FR) L'invention concerne un dispositif codeur (20) dans lequel une première unité de codage (21) code, à l'aide d'un code RS, chacune de premières séquences de données présentes dans une direction différente de la direction de rangée de données d'entrée, générant ainsi une parité de code RS, et ajoute la parité de code RS à chacune des premières séquences de données, générant ainsi des données codées, et élargissant par conséquent une matrice. Une seconde unité de codage (22) code, à l'aide d'un code BCH et d'un code LDPC, chacune de secondes séquences de données présentes dans la direction de rangée des données codées, générant ainsi des parités de code BCH et de code LDPC, et génère une pluralité de trames DVB-S2 (13) comprenant chacune une séquence de données présente dans la direction de rangée des données codées et les parités de code BCH et de code LDPC correspondantes.
(JA) 符号化装置(20)において、第1符号化部(21)は、入力データの行方向とは異なる方向に沿って存在する各第1データ系列をRS符号により符号化することでRS符号のパリティを生成し、RS符号のパリティを各第1データ系列に付加することで符号化データを生成し、結果として行列を拡張する。第2符号化部(22)は、符号化データの行方向に沿って存在する各第2データ系列をBCH符号およびLDPC符号により符号化することでBCH符号およびLDPC符号のパリティを生成し、1つのDVB-S2フレーム(13)につき符号化データの行方向に沿って存在する1つのデータ系列および対応するBCH符号およびLDPC符号のパリティを含む複数のDVB-S2フレーム(13)を生成する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)