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1. (WO2019063771) GALVANIC ISOLATED DEVICE AND CORRESPONDING SYSTEM
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Claims

1. A device, comprising:

an optoelectric circuit (15) configured to provide galvanic isolation between a first circuit (27a) and a second circuit (27b),

wherein the optoelectric circuit (15) includes:

at least one non-inverting buffer (29a, 29b, 29c) positioned between a collector of a phototransistor (26a) and an anode of a light emitting diode (24b), and

a metal semiconductor diode positioned between the collector of the photoresistor and the at least one non-inverting buffer.

2. The device of claim 1, wherein at least three non- inverting buffers are positioned between the collector of the phototransistor and the anode of the light emitting diode.

3. A system, comprising:

a first circuit and a second circuit; and

an optoelectric circuit configured to provide galvanic isolation between the first circuit and the second circuit according to any one of claims 1-2.

4. The device according to any of claims 1-2, or the system according to claim 3, wherein at least one of the first circuit and the second circuit is an Inter- integrated circuit (I2C).

5. The device according to any of claims 1-2, or the system according to any of claims 3- 4, wherein at least one of the first circuit and the second circuit is coupled to a high- voltage AC power supply.

6. A method, comprising:

providing a signal to an optoelectric circuit from a first circuit;

transmitting the received signal to a second circuit using the optoelectric circuit;

wherein the optoelectric circuit includes:

at least one non-inverting buffer positioned between a collector of a phototransistor and an anode of a light emitting diode, and

a metal semiconductor diode positioned between the collector of the phototransistor and the at least one non-inverting buffer.

7. The method of claim 6, wherein at least three non-inverting buffers are positioned between the collector of the phototransistor and the anode of the light emitting diode.

8. The method of any one of claims 6-7, wherein at least one of the first circuit and the second circuit is an Inter-integrated circuit (I2C).

9. A computer program product for a programmable apparatus, the computer program product comprising a sequence of instructions for implementing a method according to any according to any one of claims 6-8, when loaded into and executed by the programmable apparatus.