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1. (WO2019062036) LED EPITAXIAL STRUCTURE, AND MANUFACTURING METHOD THEREOF
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Pub. No.: WO/2019/062036 International Application No.: PCT/CN2018/078656
Publication Date: 04.04.2019 International Filing Date: 12.03.2018
IPC:
H01L 33/20 (2010.01) ,H01L 33/00 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
20
with a particular shape, e.g. curved or truncated substrate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
Applicants:
厦门三安光电有限公司 XIAMEN SAN'AN OPTOELECTRONICS CO., LTD. [CN/CN]; 中国福建省厦门市 同安区洪塘镇民安大道841-899号 No.841-899, Min An Road, Hongtang Town, Tongan District Xiamen, Fujian 361100, CN
Inventors:
程志青 CHENG, Chih-Ching; CN
宋长伟 SONG, Changwei; CN
徐志波 XU, Zhibo; CN
林兓兓 LIN, Chan-Chan; CN
蔡吉明 TSAI, Chi-Ming; CN
Priority Data:
201710886241.427.09.2017CN
Title (EN) LED EPITAXIAL STRUCTURE, AND MANUFACTURING METHOD THEREOF
(FR) STRUCTURE ÉPITAXIALE DE DEL ET SON PROCÉDÉ DE FABRICATION
(ZH) 一种LED外延结构及其制备方法
Abstract:
(EN) An LED epitaxial structure, and manufacturing method thereof. A plurality of magnesium nitride compound-based nucleation structures (8) are inserted between an electron blocking layer (6) and an ultimate barrier layer (5), and the nucleation structures (8) are used as cores to grow a plurality of island structures (9). In this way, total internal reflection at an interface of the electron blocking layer (6) and the ultimate barrier layer (5) is reduced, such that a large portion of light emitted by a multi-quantum well light-emitting layer (4) can enter the electron blocking layer (6), thus improving light-emitting efficiency of the LED epitaxial structure. In addition, the electron blocking layer (6) is used to fill gaps between the island structures (9), thus creating a level surface of the LED epitaxial structure.
(FR) La présente invention concerne une structure épitaxiale de DEL et son procédé de fabrication. Une pluralité de structures de nucléation à base de composé de nitrure de magnésium (8) sont insérées entre une couche de blocage d'électrons (6) et une couche barrière ultime (5), et les structures de nucléation (8) sont utilisées en tant que noyaux pour faire croître une pluralité de structures d'îlot (9). De cette manière, la réflexion interne totale au niveau d'une interface de la couche de blocage d'électrons (6) et de la couche barrière finale (5) est réduite, de telle sorte qu'une grande partie de la lumière émise par une couche électroluminescente à puits quantiques multiples (4) peut entrer dans la couche de blocage d'électrons (6), améliorant ainsi l'efficacité d'électroluminescence de la structure épitaxiale de DEL. De plus, la couche de blocage d'électrons (6) est utilisée pour remplir des espaces entre les structures d'îlot (9), créant ainsi une surface plane de la structure épitaxiale de DEL.
(ZH) 一种LED外延结构及其制备方法,在电子阻挡层(6)与最后势垒层(5)之间插入复数个氮化镁化合物成核结构(8),并以此成核结构(8)为核心,生长复数个岛状结构(9),以减少光在电子阻挡层(6)与最后势垒层(5)界面处的全反射现象,使从多量子阱发光层(4)发出的光更多的进入电子阻挡层(6),进而提高LED外延结构的出光效率,并通过电子阻挡层(6)填平岛状结构(9),继而得到一表面平整的LED外延结构。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)