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1. (WO2019061711) MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY SUBSTRATE
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Pub. No.: WO/2019/061711 International Application No.: PCT/CN2017/110200
Publication Date: 04.04.2019 International Filing Date: 09.11.2017
IPC:
H01L 27/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
Applicants:
深圳市华星光电半导体显示技术有限公司 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD. [CN/CN]; 中国广东省深圳市 光明新区公明街道塘明大道9-2号 No. 9-2 Tangming Road,Gongming Street Guangming New District Shenzhen, Guangdong 518132, CN
Inventors:
方俊雄 FANG, Chun-Hsiung; CN
吕伯彦 LU, Po-Yen; CN
Agent:
深圳翼盛智成知识产权事务所(普通合伙) ESSEN PATENT & TRADEMARK AGENCY; 中国广东省深圳市 福田区深南大道6021号喜年中心A座1709-1711 Hailrun Complex Block A Room 1709-1711 No. 6021 Shennan Blvd., Futian District Shenzhen, Guangdong 518040, CN
Priority Data:
201710916437.330.09.2017CN
Title (EN) MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY SUBSTRATE
(FR) PROCÉDÉ DE FABRICATION DE SUBSTRAT MATRICIEL DE TRANSISTOR DE FILM MINCE
(ZH) 一种薄膜晶体管阵列基板的制作方法
Abstract:
(EN) A manufacturing method of a thin film transistor array substrate, the method comprising: depositing, before depositing an active metal layer, a first photoresist layer (206) on a substrate, exposing and developing the first photoresist layer, removing, by means of a lift-off process, the first photoresist layer and an active metal on a surface of a gate layer, such that the surface of the gate layer is not covered by the active metal, and enabling, by means of a predetermined process step, the active metal to undergo a chemical reaction with a portion of an active layer (203).
(FR) La présente invention concerne un procédé de fabrication d'un substrat matriciel de transistor de film mince, le procédé consistant : à déposer, avant dépôt d'une couche de métal active, une première couche de résine photosensible (206) sur un substrat, à exposer et à développer la première couche de résine photosensible, à supprimer, au moyen d'un processus de décollement, la première couche de résine photosensible et un métal actif sur une surface d'une couche de grille, de telle sorte que la surface de la couche de grille n'est pas recouverte par le métal actif, et à permettre, au moyen d'une étape de processus prédéterminé, au métal actif de subir une réaction chimique avec une partie d'une couche active (203).
(ZH) 一种薄膜晶体管阵列基板的制作方法,在沉积活性金属层之前,在衬底基板上沉积第一光阻层(206),对第一光阻层曝光、显影后,通过剥离工艺将栅极层表面的第一光阻层与活性金属剥离,使得栅极层表面未被活性金属所覆盖,并利用预定工序使活性金属与部分有源层(203)发生化学反应。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)