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1. WO2019055307 - PACKAGING TECHNIQUES FOR BACKSIDE MESH CONNECTIVITY

Publication Number WO/2019/055307
Publication Date 21.03.2019
International Application No. PCT/US2018/049939
International Filing Date 07.09.2018
IPC
H01L 23/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
CPC
G09C 1/00
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
CCODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
1Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
H01L 23/576
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
57Protection from inspection, reverse engineering or tampering
576using active circuits
H04L 9/0866
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Cryptographic mechanisms or cryptographic; arrangements for secret or secure communication
08Key distribution ; or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
0861Generation of secret information including derivation or calculation of cryptographic keys or passwords
0866involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
Applicants
  • CRYPTOGRAPHY RESEARCH, INC. [US]/[US]
Inventors
  • BEST, Scott C.
  • LI, Ming
Agents
  • GRANGE, Kevin O.
Priority Data
62/559,40515.09.2017US
62/592,15929.11.2017US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) PACKAGING TECHNIQUES FOR BACKSIDE MESH CONNECTIVITY
(FR) TECHNIQUES D'EMBALLAGE POUR CONNECTIVITÉ DE MAILLE ARRIÈRE
Abstract
(EN)
The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.
(FR)
Les modes de réalisation de la présente invention concernent des technologies pour des mailles de sécurité arrière d'emballages semi-conducteurs. Un boîtier comprend un substrat ayant une première borne d'interconnexion d'un premier type et une seconde borne d'interconnexion d'un second type. L'emballage comprend également une première structure de maille de sécurité disposée sur un premier côté d'une puce de circuit intégré et un chemin conducteur couplé entre la première borne d'interconnexion et la seconde borne d'interconnexion. La première structure de maille de sécurité est couplée à la première borne d'interconnexion et la seconde borne d'interconnexion est couplée à une borne sur un second côté de la puce de circuit intégré.
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