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1. (WO2019050670) POWER SWITCHING DEVICES WITH HIGH DV/DT CAPABILITY AND METHODS OF MAKING SUCH DEVICES
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Pub. No.: WO/2019/050670 International Application No.: PCT/US2018/047269
Publication Date: 14.03.2019 International Filing Date: 21.08.2018
IPC:
H01L 29/78 (2006.01) ,H01L 29/739 (2006.01) ,H01L 29/423 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70
Bipolar devices
72
Transistor-type devices, i.e. able to continuously respond to applied control signals
739
controlled by field effect
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
423
not carrying the current to be rectified, amplified or switched
Applicants:
CREE, INC. [US/US]; 4600 Silicon Drive Durham, North Carolina 27703, US
Inventors:
ZHANG, Qingchun; US
BARKLEY, Adam; US
RYU, Sei-Hyung; US
HULL, Brett; US
Agent:
AYERS, Randal; US
Priority Data:
15/699,14908.09.2017US
Title (EN) POWER SWITCHING DEVICES WITH HIGH DV/DT CAPABILITY AND METHODS OF MAKING SUCH DEVICES
(FR) DISPOSITIFS DE COMMUTATION DE COURANT À CAPACITÉ DV/DT ÉLEVÉE ET LEURS PROCÉDÉS DE FABRICATION
Abstract:
(EN) Power switching devices include a semiconductor layer structure that has an active region and an inactive region. The active region includes a plurality of unit cells and the inactive region includes a field insulating layer on the semiconductor layer structure and a gate pad on the field insulating layer opposite the semiconductor layer structure. A gate insulating pattern is provided on the semiconductor layer structure between the active region and the field insulating layer, and at least one source/drain contact is provided through the gate pad and the field insulating layer reaching the body well extension of the semiconductor layer structure.
(FR) L'invention concerne des dispositifs de commutation de courant qui comprennent une structure stratifiée semi-conductrice qui comporte une région active et une région inactive. La région active comprend une pluralité de cellules unitaires et la région inactive comprend une couche d'isolation de champ sur la structure de couche semi-conductrice et un plot de grille sur la couche d'isolation de champ opposée à la structure de couche semi-conductrice. Un motif d'isolation de grille est disposé sur la structure de couche semi-conductrice entre la région active et la couche d'isolation de champ, et au moins un contact source/drain est disposé à travers le plot de grille et la couche d'isolation de champ atteignant l'extension de puits de corps de la structure de couche semi-conductrice.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)