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1. (WO2019050555) QUANTUM CIRCUITS WITH REDUCED T GATE COUNT
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Pub. No.: WO/2019/050555 International Application No.: PCT/US2017/067577
Publication Date: 14.03.2019 International Filing Date: 20.12.2017
IPC:
G06N 99/00 (2010.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
N
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
99
Subject matter not provided for in other groups of this subclass
Applicants:
GOOGLE LLC [US/US]; 1600 Amphitheatre Parkway Mountain View, California 94043, US
Inventors:
GIDNEY, Craig; US
Agent:
VALENTINO, Joseph; US
Priority Data:
62/556,16308.09.2017US
Title (EN) QUANTUM CIRCUITS WITH REDUCED T GATE COUNT
(FR) CIRCUITS QUANTIQUES AYANT UN NOMBRE DE PORTES T RÉDUIT
Abstract:
(EN) Methods, systems and apparatus for producing quantum circuits with low T gate counts. In one aspect, a method for performing a temporary logical AND operation on two control qubits includes the actions of obtaining an ancilla qubit in an A-state; computing a logical-AND of the two control qubits and storing the computed logical-AND in the state of the ancilla qubit, comprising replacing the A-state of the ancilla qubit with the logical-AND of the two control qubits; maintaining the ancilla qubit storing the logical-AND of the two controls until a first condition is satisfied; and erasing the ancilla qubit when the first condition is satisfied.
(FR) La présente invention se rapporte à des procédés, à des systèmes et à un appareil permettant de produire des circuits quantiques ayant un faible nombre de portes T. Selon un aspect, un procédé permettant d'effectuer une opération ET logique temporaire sur deux bits quantiques de commande comprend les actions consistant à obtenir un bit quantique auxiliaire dans un état A ; à calculer un ET logique des deux bits quantiques de commande et à stocker le ET logique calculé dans l'état du bit quantique auxiliaire, consistant à remplacer l'état A du bit quantique auxiliaire par le ET logique des deux bits quantiques de commande ; à garder le bit quantique auxiliaire stockant le ET logique des deux commandes jusqu'à ce qu'une première condition soit remplie ; et à effacer le bit quantique auxiliaire lorsque la première condition est remplie.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)