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1. (WO2019050296) SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME
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Pub. No.: WO/2019/050296 International Application No.: PCT/KR2018/010420
Publication Date: 14.03.2019 International Filing Date: 06.09.2018
IPC:
H01L 33/08 (2010.01) ,H01L 33/00 (2010.01) ,H01L 33/58 (2010.01) ,H01L 33/36 (2010.01) ,H01L 33/62 (2010.01) ,H01L 33/10 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
08
with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
58
Optical field-shaping elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
36
characterised by the electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
62
Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
10
with a light reflecting structure, e.g. semiconductor Bragg reflector
Applicants:
주식회사 세미콘라이트 SEMICON LIGHT CO.,LTD. [KR/KR]; 경기도 용인시 기흥구 원고매로2번길 49 3층 3F 49, Wongomae-ro 2beon-gil, Giheung-gu Yongin-si Gyeonggi-do 17086, KR
Inventors:
박대석 PARK, Dae Seok; KR
설대수 SOUL, Dae Soo; KR
Agent:
안상정 AN, Sang Jeong; KR
Priority Data:
10-2017-011509708.09.2017KR
Title (EN) SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME
(FR) DISPOSITIF ÉLECTROLUMINESCENT À SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(KO) 반도체 발광 소자 및 이의 제조방법
Abstract:
(EN) The present disclosure relates to a method for manufacturing a semiconductor light emitting device, the method comprising: a step for forming an insulation region between a plurality of semiconductor layers to divide the plurality of semiconductor layers into a first light emitting part having a first light emitting region and a second light emitting part having a second light emitting region, wherein the plurality of semiconductor layers are configured by sequentially stacking a first semiconductor layer having a first conductivity, an active layer for generating light through the recombination of an electron and a hole, and a second semiconductor layer having a second conductivity different from the first conductivity; a step for forming a light absorption prevention film on the insulation region and on at least some regions of the second semiconductor layer; a step for mesa-etching the active layer and the remaining regions of the second semiconductor layer, thereby forming a light transmissive conductive film to cover the light absorption prevention film; a step for forming a connection electrode that electrically connects the neighboring first and second light emitting parts; a step for forming a reflective layer to cover the plurality of semiconductor layers and the connection electrode; and a step for forming an electrode part that is formed on the reflective layer and electrically connected to the plurality of semiconductor layers.
(FR) La présente invention concerne un procédé de fabrication d'un dispositif électroluminescent à semi-conducteur, le procédé comprenant : une étape consistant à former une région d'isolation entre une pluralité de couches semi-conductrices pour diviser la pluralité de couches semi-conductrices en une première partie d'émission de lumière ayant une première région d'émission de lumière et une seconde partie d'émission de lumière ayant une seconde région d'émission de lumière, la pluralité de couches semi-conductrices étant configurée par empilement séquentiel d'une première couche semi-conductrice ayant une première conductivité, d'une couche active pour générer de la lumière par recombinaison d'un électron et d'un trou, et d'une seconde couche semi-conductrice ayant une seconde conductivité différente de la première conductivité ; une étape consistant à former un film de prévention d'absorption de lumière sur la région d'isolation et sur au moins certaines régions de la seconde couche semi-conductrice ; une étape de gravure mesa de la couche active et des régions restantes de la seconde couche semi-conductrice, de sorte à former un film conducteur transmettant la lumière pour recouvrir le film de prévention d'absorption de lumière ; une étape consistant à former une électrode de connexion qui connecte électriquement les première et seconde parties d'émission de lumière voisines ; une étape consistant à former une couche réfléchissante pour recouvrir la pluralité de couches semi-conductrices et l'électrode de connexion ; et une étape consistant à former une partie d'électrode qui est formée sur la couche réfléchissante et connectée électriquement à la pluralité de couches semi-conductrices.
(KO) 본 개시는, 반도체 발광 소자의 제조 방법에 있어서, 제1 도전성을 가지는 제1 반도체층, 전자와 정공의 재결합을 통해 빛을 생성하는 활성층 및 제1 도전성과 다른 제2 도전성을 가지는 제2 반도체층이 순차적으로 적층된 복수의 반도체층 사이에 절연 영역을 형성하여 제1 발광영역을 갖는 제1 발광부와 제2 발광영역을 갖는 제2 발광부로 분리하는 단계; 절연 영역 및 제2 반도체층의 적어도 일부분에 빛흡수 방지막을 형성하는 단계; 활성층 및 나머지 제2 반도체층의 일부를 메사 식각하여 빛흡수 방지막을 덮도록 투광성 도전막을 형성하는 단계; 이웃하는 제1 및 제2 발광부들을 전기적을 연결하는 연결 전극을 형성하는 단계; 복수의 반도체층 및 연결전극을 덮도록 반사층을 형성하는 단계; 그리고 반사층 위에 형성되어 복수의 반도체층과 전기적으로 연결되는 전극부를 형성하는 단계;를 포함하는 반도체 발광소자의 제조 방법에 관한 것이다.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)