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1. (WO2019048982) COMPUTATION DEVICE AND ELECTRONIC EQUIPMENT
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Pub. No.: WO/2019/048982 International Application No.: PCT/IB2018/056531
Publication Date: 14.03.2019 International Filing Date: 28.08.2018
IPC:
G06F 1/32 (2006.01) ,G06G 7/60 (2006.01) ,H01L 21/8242 (2006.01) ,H01L 27/108 (2006.01) ,H01L 29/786 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
26
Power supply means, e.g. regulation thereof
32
Means for saving power
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
G
ANALOGUE COMPUTERS
7
Devices in which the computing operation is performed by varying electric or magnetic quantities
48
Analogue computers for specific processes, systems, or devices, e.g. simulators
60
for living beings, e.g. their nervous systems
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8242
Dynamic random access memory structures (DRAM)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
108
Dynamic random access memory structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
株式会社半導体エネルギー研究所 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP/JP]; 神奈川県厚木市長谷398 398, Hase, Atsugi-shi, Kanagawa 2430036, JP
Inventors:
石津貴彦 ISHIZU, Takahiko; JP
池田隆之 IKEDA, Takayuki; JP
磯部敦生 ISOBE, Atsuo; JP
宮口厚 MIYAGUCHI, Atsushi; JP
山崎舜平 YAMAZAKI, Shunpei; JP
Priority Data:
2017-17150906.09.2017JP
2017-17151106.09.2017JP
2017-17152406.09.2017JP
Title (EN) COMPUTATION DEVICE AND ELECTRONIC EQUIPMENT
(FR) DISPOSITIF DE CALCUL ET ÉQUIPEMENT ÉLECTRONIQUE
(JA) 演算装置および電子機器
Abstract:
(EN) The purpose of the present invention is to provide a computation device and electronic equipment that consume little power. The purpose of the present invention is to provide a computation device and electronic equipment capable of high-speed operation. The purpose of the present invention is to provide a computation device and electronic equipment in which heat generation can be suppressed. The computation device has a first computation unit and a second computation unit. The first computation unit has a first CPU core and a second CPU core. The second computation unit has a first GPU core and a second GPU core. Each CPU core has a power gating function, and has a first data holding circuit connected to a flip flop. The first GPU core has a second data holding circuit capable of holding an analog value and reading out the analog value as two or more bits of digital data. The second GPU core has a third data holding circuit capable of holding a digital value and reading out the digital value as one bit of digital data. The first through third holding circuits each have a capacitor element and a transistor that has an oxide semiconductor.
(FR) La présente invention a pour objet de fournir un dispositif de calcul et un équipement électronique qui consomment peu d'énergie. La présente invention a pour objet de fournir un dispositif de calcul et un équipement électronique pouvant fonctionner à grande vitesse. La présente invention a pour objet de fournir un dispositif de calcul et un équipement électronique dans lesquels la génération de chaleur peut être supprimée. Le dispositif de calcul comprend une première unité de calcul et une seconde unité de calcul. La première unité de calcul comprend un premier cœur de CPU et un second cœur de CPU. La seconde unité de calcul comprend un premier cœur de GPU et un second cœur de GPU. Chaque cœur de CPU a une fonction de portillonnage de puissance, et a un premier circuit de maintien de données connecté à une bascule bistable. Le premier cœur de GPU a un second circuit de maintien de données capable de maintenir une valeur analogique et de lire la valeur analogique sous la forme d'au moins deux bits de données numériques. Le second cœur de GPU a un troisième circuit de maintien de données capable de maintenir une valeur numérique et de lire la valeur numérique en tant que bit de données numériques. Les premier à troisième circuits de maintien comprennent chacun un élément de condensateur et un transistor qui a un semi-conducteur d'oxyde.
(JA) 要約書 消費電力の小さい演算装置および電子機器を提供すること。高速動作が可能な演算装置および電子機器 を提供すること。発熱の抑制が可能な演算装置および電子機器を提供すること。 演算装置は、第1の演算部と、第2の演算部と、を有する。第1の演算部は、第1のCPUコアと、第2のCPU コアと、を有する。第2の演算部は、第1のGPUコアと、第2のGPUコアと、を有する。CPUコアは、パワー ゲーティング機能を有し、フリップフロップに接続されている第1のデータ保持回路を有する。第1のGPUコ アは、アナログ値を保持し、2ビット以上のデジタルデータとして読み出すことができる第2のデータ保持回 路を有する。第2のGPUコアは、デジタル値を保持し、1ビットのデジタルデータとして読み出すことができる 第3のデータ保持回路を有する。第1乃至第3のデータ保持回路は、それぞれ酸化物半導体を有するトラン ジスタおよび容量素子を有する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)