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1. (WO2019048061) CARRIER AND OPTOELECTRONIC COMPONENT
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Pub. No.: WO/2019/048061 International Application No.: PCT/EP2017/072692
Publication Date: 14.03.2019 International Filing Date: 11.09.2017
IPC:
H01L 33/62 (2010.01) ,H01L 33/48 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
62
Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
Applicants:
OSRAM OPTO SEMICONDUCTORS GMBH [DE/DE]; Leibnizstr. 4 93055 Regensburg, DE
Inventors:
OOI, Chee Eng; MY
ITHNAIN, Ismail; MY
LIM, Choo Kean; MY
CHAN, Weng Heng; MY
Agent:
PATENT ATTORNEYS WILHELM & BECK; Prinzenstr. 13 80639 Munich, DE
Priority Data:
Title (EN) CARRIER AND OPTOELECTRONIC COMPONENT
(FR) SUPPORT ET COMPOSANT OPTOÉLECTRONIQUE
Abstract:
(EN) The invention relates to a carrier for an optoelectronic semi-conductor chip, comprising a flat top side, a flat underside and a first side surface. The carrier comprises a first lead frame section,which ranges from the top side to the underside of the carrier, embedded within an insulating material. The first lead frame section comprises a first tie bar, extending to the first side surface. At the first side surface, the insulating material is arranged between the top side of the carrier and the first tie bar as well as between the under-side of the carrier and the first tie bar.
(FR) Cette invention concerne un support pour une puce semi-conductrice optoélectronique, comprenant un côté supérieur plan, un côté inférieur plan et une première surface latérale. Le support comprend une première section de grille de connexion, qui s'étend du côté supérieur au côté inférieur du support, encastrée dans un matériau isolant. La première section de grille de connexion comprend une première barre de liaison, s'étendant jusqu'à la première surface latérale. Sur la première surface latérale, le matériau isolant est disposé entre le côté supérieur du support et la première barre de liaison ainsi qu'entre le côté inférieur du support et la première barre de liaison.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)