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1. (WO2019046037) MANAGED NVM ADAPTIVE CACHE MANAGEMENT
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Pub. No.: WO/2019/046037 International Application No.: PCT/US2018/047195
Publication Date: 07.03.2019 International Filing Date: 21.08.2018
IPC:
G06F 3/06 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
Applicants:
MICRON TECHNOLOGY, INC. [US/US]; 8000 So. Federal Way Boise, Idaho 83716-9632, US
Inventors:
CHRISTENSEN, Carla L.; US
HUANG, Jianmin; US
JEAN, Sebastien Andre; US
TANPAIROJ, Kulachet; US
Agent:
PERDOK, Monique M.; US
ARORA, Suneel; US
BEEKMAN, Marvin L.; US
BLACK, David W.; US
SCHEER, Bradley W.; US
Priority Data:
15/691,14730.08.2017US
Title (EN) MANAGED NVM ADAPTIVE CACHE MANAGEMENT
(FR) GESTION DE MÉMOIRE CACHE ADAPTATIVE À MÉMOIRE PERMANENTE GÉRÉE
Abstract:
(EN) Disclosed in some examples are memory devices which feature customizable Single Level Cell (SLC) and Multiple Level Cell (MLC) configurations. The configuration (e.g., the size and position) of the SLC cache may have an impact on power consumption, speed, and other performance of the memory device. An operating system of an electronic device to which the memory device is installed may wish to achieve different performance of the device based upon certain conditions detectable by the operating system. In this way, the performance of the memory device can be customized by the operating system through adjustments of the performance characteristics of the SLC cache.
(FR) L'invention concerne, dans certains exemples, des dispositifs de mémoire qui présentent des configurations de mémoire à un niveau (SLC) et de mémoire à plusieurs niveaux (MLC) personnalisables. La configuration (par ex. la taille et la position) de la mémoire cache SLC peut avoir un impact sur la consommation d'énergie, la vitesse et d'autres performances du dispositif de mémoire. Un système d'exploitation d'un dispositif électronique dans lequel le dispositif de mémoire est installé peut souhaiter obtenir différentes performances du dispositif sur la base de certaines conditions détectables par le système d'exploitation. De cette manière, les performances du dispositif de mémoire peuvent être personnalisées par le système d'exploitation par des ajustements des caractéristiques de performance de la mémoire cache SLC.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)