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1. WO2019045931 - RANDOM ACCESS MEMORY POWER SAVINGS

Publication Number WO/2019/045931
Publication Date 07.03.2019
International Application No. PCT/US2018/044400
International Filing Date 30.07.2018
IPC
G11C 11/4074 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
G11C 5/14 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
5Details of stores covered by group G11C11/63
14Power supply arrangements
CPC
G06F 1/3275
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
325Power saving in peripheral device
3275Power saving in memory, e.g. RAM, cache
G06F 12/0223
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
0223User address space allocation, e.g. contiguous or non contiguous base addressing
G06F 12/0284
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
0223User address space allocation, e.g. contiguous or non contiguous base addressing
0284Multiple user address space allocation, e.g. using different base addresses
G06F 12/04
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
04Addressing variable-length words or parts of words
G06F 2212/1028
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
10Providing a specific technical effect
1028Power efficiency
G06F 2212/1044
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
10Providing a specific technical effect
1041Resource optimization
1044Space efficiency improvement
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • JEAN, Sebastien Andre
Agents
  • PERDOK, Monique M.
  • ARORA, Suneel
  • BEEKMAN, Marvin L.
  • BLACK, David W.
  • SCHEER, Bradley W.
Priority Data
15/690,93330.08.2017US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) RANDOM ACCESS MEMORY POWER SAVINGS
(FR) ÉCONOMIES D'ÉNERGIE DE MÉMOIRE VIVE
Abstract
(EN)
Devices and techniques for random access memory power savings are disclosed herein. Data contained in RAM is compressed in response to obtaining a trigger. Here, the RAM organized into several discrete hardware components with a corresponding power control. The data contained in the RAM is replaced with the compressed data to free a discrete hardware component of the RAM. The discrete hardware component is then powered down via the corresponding power control.
(FR)
L'invention concerne des dispositifs et des techniques pour des économies d'énergie de mémoire vive. Les données contenues dans la RAM sont compressées en réponse à l'obtention d'un déclencheur. Ici, la RAM est organisée en plusieurs composants matériels discrets avec une commande de puissance correspondante. Les données contenues dans la RAM sont remplacées par les données compressées afin de libérer un composant matériel discret de la RAM. Le composant matériel discret est ensuite mis hors tension par l'intermédiaire de la commande de puissance correspondante.
Also published as
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