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1. (WO2019045886) SEMICONDUCTOR DEVICE WITH A PROTECTION MECHANISM AND ASSOCIATED SYSTEM, DEVICES, AND METHODS
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Pub. No.: WO/2019/045886 International Application No.: PCT/US2018/041746
Publication Date: 07.03.2019 International Filing Date: 12.07.2018
IPC:
H01L 23/528 (2006.01) ,H01L 23/532 (2006.01) ,H01L 23/00 (2006.01) ,H01L 23/31 (2006.01) ,H01L 23/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
522
including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528
Layout of the interconnection structure
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
522
including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
532
characterised by the materials
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
31
characterised by the arrangement
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
Applicants:
MICRON TECHNOLOGY, INC. [US/US]; 8000 S. Federal Way, P.O. Box 6 Boise, ID 83707-0006, US
Inventors:
ZHOU, Wei; US
STREET, Bret K.; US
TUTTLE, Mark E.; US
Agent:
PARKER, Paul T.; US
ARAIZA, Alberto, G.; US
SUMEDHA, Ahuja; US
AI, Bing; US
ARNETT, Stephen, E.; US
Priority Data:
15/693,23031.08.2017US
Title (EN) SEMICONDUCTOR DEVICE WITH A PROTECTION MECHANISM AND ASSOCIATED SYSTEM, DEVICES, AND METHODS
(FR) DISPOSITIF À SEMI-CONDUCTEURS DOTÉ D'UN MÉCANISME DE PROTECTION ET SYSTÈME, DISPOSITIFS ET PROCÉDÉS ASSOCIÉS
Abstract:
(EN) A semiconductor device includes a substrate including a substrate top surface; interconnects connected to the substrate and extending above the substrate top surface; a die attached over the substrate, wherein the die includes a die bottom surface that connects to the interconnects for electrically coupling the die and the substrate; and a metal enclosure directly contacting and vertically extending between the substrate top surface and the die bottom surface, wherein the metal enclosure peripherally surrounds the interconnects.
(FR) La présente invention concerne un dispositif à semi-conducteurs qui comprend un substrat comprenant une surface supérieure de substrat; des interconnexions connectées au substrat et s'étendant au-dessus de la surface supérieure de substrat; une puce fixée sur le substrat, la puce comprenant une surface inférieure de puce qui se connecte aux interconnexions pour coupler électriquement la puce et le substrat; et une enceinte métallique en contact direct avec la surface supérieure de substrat et la surface inférieure de puce et s'étendant verticalement entre elles, l'enceinte métallique entourant de manière périphérique les interconnexions.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)