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1. (WO2019045784) MEMORY LOOPBACK SYSTEMS AND METHODS
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Pub. No.: WO/2019/045784 International Application No.: PCT/US2018/027817
Publication Date: 07.03.2019 International Filing Date: 16.04.2018
IPC:
G11C 7/10 (2006.01) ,G11C 5/04 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
7
Arrangements for writing information into, or reading information out from, a digital store
10
Input/output (I/O) data interface arrangements, e.g. I/O data control circuits, I/O data buffers
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
5
Details of stores covered by group G11C11/63
02
Disposition of storage elements, e.g. in the form of a matrix array
04
Supports for storage elements; Mounting or fixing of storage elements on such supports
Applicants:
MICRON TECHNOLOGY, INC [US/US]; 8000 South Federal Way Boise, Idaho 83707, US
Inventors:
WILMOTH, David D.; US
Agent:
MANWARE, Robert A.; US
FLETCHER, Michael G.; US
YODER, Patrick S.; US
POWELL, W. Allen; US
RARIDEN, John M.; US
SWANSON, Tait R.; US
BAKKER, Jila; US
SINCLAIR, JR., Steven J.; US
OSTERHAUS, Matthew G.; US
DOOLEY, Matthew C.; US
HENWOOD, Matthew C.; US
KANTOR, Andrew L.; US
WIMMER, Lance G.; US
BELLAH, Sean J.; US
THOMAS, Jim; US
CORLEY, David; US
Priority Data:
15/693,11431.08.2017US
Title (EN) MEMORY LOOPBACK SYSTEMS AND METHODS
(FR) SYSTÈMES ET PROCÉDÉS DE BOUCLAGE DE MÉMOIRE
Abstract:
(EN) One embodiment of the present disclosure describes a memory system that may include one or more memory devices that may store data. The memory devices may receive command signals to access the stored data as a loopback signal. The memory devices may operate in a normal operational mode, a loopback operational mode, a retrieval operational mode, a non-inverting pass-through operational sub-mode, and an inverting pass-through operational sub-mode. The operational modes facilitate the transmission of the loopback signal for the purpose of monitoring of memory device operations. A selective inversion technique, which uses the operational modes, may protect the loopback signal integrity during transmission.
(FR) Selon un mode de réalisation, la présente invention concerne un système de mémoire qui peut comprendre un ou plusieurs dispositifs de mémoire pouvant stocker des données. Les dispositifs de mémoire peuvent recevoir des signaux de commande afin d'accéder aux données stockées en tant que signal de bouclage. Les dispositifs de mémoire peuvent fonctionner dans un mode de fonctionnement normal, un mode de fonctionnement de bouclage, un mode de fonctionnement de récupération, un sous-mode de fonctionnement d'intercommunication à non-inversion et un sous-mode de fonctionnement d'intercommunication à inversion. Les modes de fonctionnement facilitent la transmission du signal de bouclage en vue de surveiller des opérations de dispositif de mémoire. Une technique d'inversion sélective, qui utilise les modes de fonctionnement, peut protéger l'intégrité du signal de bouclage pendant la transmission.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)