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1. (WO2019043950) SEMICONDUCTOR MODULE AND POWER CONVERSION DEVICE
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Pub. No.: WO/2019/043950 International Application No.: PCT/JP2017/031807
Publication Date: 07.03.2019 International Filing Date: 04.09.2017
IPC:
H01L 21/60 (2006.01) ,H01L 21/52 (2006.01) ,H01L 23/48 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
52
Mounting semiconductor bodies in containers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
Applicants:
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
Inventors:
碓井 修 USUI, Osamu; JP
Agent:
高田 守 TAKADA, Mamoru; JP
高橋 英樹 TAKAHASHI, Hideki; JP
Priority Data:
Title (EN) SEMICONDUCTOR MODULE AND POWER CONVERSION DEVICE
(FR) MODULE À SEMI-CONDUCTEUR ET DISPOSITIF DE CONVERSION D’ÉNERGIE
(JA) 半導体モジュール及び電力変換装置
Abstract:
(EN) A semiconductor chip (2) has a surface electrode (3). An electrically conductive joining member (8) is provided above the surface electrode (3), and has first and second joining members (8a, 8b). A lead electrode (9) is joined to a portion of the surface electrode (3) with the first joining member (8a) interposed, and is not in contact with the second joining member (8b). A signal wire (11) is joined to the surface electrode (3). The second joining member (8b) is placed between the first joining member (8a) and the signal wire (11). The thickness of the first joining member (8a) is thicker than the thickness of the second joining member (8b).
(FR) L'invention concerne une puce semi-conductrice (2) qui comporte une électrode de surface (3). Un élément de liaison électroconducteur (8) est disposé au-dessus de l'électrode de surface (3), et comporte des premier et second éléments de liaison (8a, 8b). Une électrode conductrice (9) est reliée à une partie de l'électrode de surface (3), le premier élément de liaison (8a) étant intercalé entre elles, et n'est pas en contact avec le second élément de liaison (8b). Un fil de signal (11) est relié à l'électrode de surface (3). Le second élément de liaison (8b) est placé entre le premier élément de liaison (8a) et le fil de signal (11). L'épaisseur du premier élément de liaison (8a) est supérieure à l'épaisseur du second élément de liaison (8b).
(JA) 半導体チップ(2)は表面電極(3)を有する。導電性接合部材(8)は表面電極(3)の上に設けられ、第1及び第2の接合部材(8a,8b)を有する。リード電極(9)は表面電極(3)の一部に第1の接合部材(8a)を介して接合され、第2の接合部材(8b)には接触していない。信号ワイヤ(11)が表面電極(3)に接合されている。第2の接合部材(8b)は第1の接合部材(8a)と信号ワイヤ(11)との間に配置されている。第1の接合部材(8a)の厚さは第2の接合部材(8b)の厚さよりも厚い。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)