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1. WO2019043551 - DETECTING UNRELIABLE BITS IN TRANSISTOR CIRCUITRY

Publication Number WO/2019/043551
Publication Date 07.03.2019
International Application No. PCT/IB2018/056485
International Filing Date 27.08.2018
IPC
G09C 1/00 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
CCIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
1Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
H04L 9/08 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Arrangements for secret or secure communication
08Key distribution
CPC
G09C 1/00
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
CCODING OR CIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
1Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
G11C 11/412
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
41forming ; static; cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
412using field-effect transistors only
G11C 11/417
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
41forming ; static; cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing, power reduction
417for memory cells of the field-effect type
H04L 2209/12
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
2209Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
12Details relating to cryptographic hardware or logic circuitry
H04L 9/3278
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Cryptographic mechanisms or cryptographic; arrangements for secret or secure communication
32including means for verifying the identity or authority of a user of the system ; or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
3271using challenge-response
3278using physically unclonable functions [PUF]
Applicants
  • BAR ILAN UNIVERSITY [IL]/[IL]
Inventors
  • SHOR, Joseph
  • WEIZMAN, Yoav
  • SCHIFMANN, Yitzhak
Agents
  • KLEIN, David
Priority Data
15/694,80903.09.2017US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) DETECTING UNRELIABLE BITS IN TRANSISTOR CIRCUITRY
(FR) DÉTECTION DE BITS NON FIABLES DANS DE LA CIRCUITERIE À TRANSISTORS
Abstract
(EN)
A method for detecting unreliable bits in transistor circuitry includes applying a controllable physical parameter to a transistor circuitry, thereby causing a variation in a digital code of a cryptologic element in the transistor circuitry, the variation being a tilt or bias in a positive or negative direction. An amount of variation in the digital code of the cryptologic element is determined. Unreliable bits in the transistor circuitry are defined as those bits for which the variation is in a range defined as unreliable.
(FR)
Selon l'invention, un procédé de détection de bits non fiables dans de la circuiterie à transistors consiste à appliquer un paramètre physique contrôlable à de la circuiterie à transistors, ce qui provoque une variation d'un code numérique d'un élément cryptologique dans la circuiterie à transistors, la variation étant une inclinaison ou une polarisation dans une direction positive ou négative. Une grandeur de variation du code numérique de l'élément cryptologique est déterminée. Des bits non fiables dans la circuiterie à transistors sont définis comme étant les bits pour lesquels la variation est dans une plage définie comme étant non fiable.
Also published as
Latest bibliographic data on file with the International Bureau