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1. (WO2019042052) SEMICONDUCTOR DEVICE
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Pub. No.: WO/2019/042052 International Application No.: PCT/CN2018/097167
Publication Date: 07.03.2019 International Filing Date: 26.07.2018
IPC:
H01L 29/73 (2006.01) ,H01L 29/739 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70
Bipolar devices
72
Transistor-type devices, i.e. able to continuously respond to applied control signals
73
Bipolar junction transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70
Bipolar devices
72
Transistor-type devices, i.e. able to continuously respond to applied control signals
739
controlled by field effect
Applicants:
昆仑芯电子科技(深圳)有限公司 KUNLUNCHIP ELECTRONIC TECHNOLOGY (SHENZHEN) CO., LTD. [CN/CN]; 中国广东省深圳市 福田区福保街道菩提路68号金桂大厦A座三楼368B Room 368 B, Floor 3, Block A, Jingui Mansion 68 Puti Road, Fubao Subdistrict, Futian District Shenzhen, Guangdong 518000, CN
Inventors:
吕信江 LYU, Xinjiang; CN
Agent:
广州市天河区倪律专利代理事务所(普通合伙) WINGUAN PATENT AND TRADEMARK ATTORNEYS; 中国广东省广州市 天河区思成路23号607 607, 23 Sicheng Road, Tianhe District Guangzhou, Guangdong 510663, CN
Priority Data:
201710757159.129.08.2017CN
Title (EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR
(ZH) 一种半导体器件
Abstract:
(EN) A semiconductor device, comprising at least one cell. The structure of any cell comprises: an N-type substrate; at least one first groove unit and at least one second groove unit provided at one side of the N-type substrate; at least one P-type semiconductor region provided at the other side of the N-type substrate, the P-type semiconductor region being an anode region; at least one N-type current-carrier barrier region; and at least one P-type electric field shielding region. The purpose of the present invention is to provide a semiconductor device, which has a novel cell structure to obtain: a large safe operating area; an anti-short circuit capability; a function of eliminating a parasitic thyristor; low gate to collector charge (QGC) to obtain the highest anti-dv/dt capability; enhancement on conductivity modulation at an emitter side to obtain large electric current density and low forward voltage drop; small turn-off loss; and low process complexity.
(FR) L'invention concerne un dispositif à semi-conducteur comprenant au moins une cellule. La structure de n'importe quelle cellule comprend : un substrat de type N ; au moins une première unité de rainure et au moins une seconde unité de rainure disposées sur un côté du substrat de type N ; au moins une région semi-conductrice de type P disposée sur l'autre côté du substrat de type N, la région semi-conductrice de type P étant une région d'anode ; au moins une région de barrière de porteur de courant de type N ; et au moins une région de blindage de champ électrique de type P. Le but de la présente invention est de fournir un dispositif à semi-conducteur, qui a une nouvelle structure de cellule pour obtenir : une grande zone de fonctionnement sûre ; une capacité anti court-circuit ; une fonction d'élimination d'un thyristor parasite ; une charge grille à collecteur faible (QGC) pour obtenir la capacité anti-dv/dt la plus élevée ; l'amélioration de la modulation de conductivité au niveau d'un côté émetteur pour obtenir une grande densité de courant électrique et une faible chute de tension directe ; une faible perte de mise hors service ; et une faible complexité de traitement.
(ZH) 一种半导体器件,包括至少一个元胞,且任意一个元胞的结构包括:N型基底;在N型基底的一侧包含至少一个第一槽单元和至少一个第二槽单元;在N型基底的另一侧包含至少一个P型半导体区,P型半导体区称为阳极区;至少一个N型载流子势垒区;至少一个P型电场屏蔽区。本发明的目的在于提出一种半导体器件,该半导体器件具有新型的元胞结构,以获得:大的安全工作区;抗短路能力;消除寄生晶闸管的作用;低栅-集电极电荷(QGC)以获得最大的抗dv/dt能力;增加发射极侧电导调制,以获得较大的电流密度和极低的导通压降;较小的关断损耗;较低的工艺复杂性。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)