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1. (WO2019041934) ELECTRODE STRUCTURE AND METHOD FOR MANUFACTURING SAME, THIN-FILM TRANSISTOR, AND ARRAY SUBSTRATE
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Pub. No.: WO/2019/041934 International Application No.: PCT/CN2018/089632
Publication Date: 07.03.2019 International Filing Date: 01.06.2018
IPC:
H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No.10 Jiuxianqiao Rd., Chaoyang District Beijing 100015, CN
Inventors:
王东方 WANG, Dongfang; CN
袁广才 YUAN, Guangcai; CN
Agent:
中国国际贸易促进委员会专利商标事务所 CCPIT PATENT AND TRADEMARK LAW OFFICE; 中国北京市 西城区阜成门外大街2号万通新世界广场8层 8th Floor, Vantone New World Plaza, 2 Fuchengmenwai Street, Xicheng District Beijing 100037, CN
Priority Data:
201710769888.930.08.2017CN
201721104937.930.08.2017CN
Title (EN) ELECTRODE STRUCTURE AND METHOD FOR MANUFACTURING SAME, THIN-FILM TRANSISTOR, AND ARRAY SUBSTRATE
(FR) STRUCTURE D'ÉLECTRODE ET SON PROCÉDÉ DE FABRICATION, TRANSISTOR À COUCHES MINCES ET SUBSTRAT DE MATRICE
(ZH) 电极结构及其制作方法、薄膜晶体管和阵列基板
Abstract:
(EN) Disclosed are an electrode structure and a method for manufacturing same, a thin-film transistor and an array substrate. An electrode structure is provided, and comprises: a conductor (23 or 25) comprising protective layers and a conductive layer (10), wherein the protective layers comprise first protective layers (11 and 12) arranged on a surface of the conductive layer, and a second protective layer (13) arranged on at least a side face of the conductive layer; and the second protective layer is used for isolating the conductive layer from the outside.
(FR) L'invention concerne une structure d'électrode et son procédé de fabrication, un transistor à couches minces et un substrat de matrice. Une structure d'électrode est prévue, et comprend : un conducteur (23 ou 25) comprenant des couches de protection et une couche conductrice (10), les couches de protection comprenant des premières couches de protection (11 et 12) disposées sur une surface de la couche conductrice, et une seconde couche de protection (13) disposée sur au moins une face latérale de la couche conductrice; et la seconde couche de protection étant utilisée pour isoler la couche conductrice de l'extérieur.
(ZH) 本发明实施例公开了一种电极结构及其制作方法、薄膜晶体管和阵列基板。提供了一种电极结构,包括:包括保护层和导电层(10)的导电体(23或25),所述保护层包括:设置在所述导电层表面的第一保护层(11和12)和设置在至少导电层侧面的第二保护层(13),所述第二保护层用于将所述导电层与外部隔离。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)