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1. (WO2019041880) METHOD FOR MANUFACTURING ARRAY SUBSTRATE, INTERMEDIATE ARRAY SUBSTRATE PRODUCT, AND ARRAY SUBSTRATE
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Pub. No.: WO/2019/041880 International Application No.: PCT/CN2018/086278
Publication Date: 07.03.2019 International Filing Date: 10.05.2018
IPC:
G02F 1/1362 (2006.01)
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362
Active matrix addressed cells
Applicants:
BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; No.10 Jiuxianqiao Rd., Chaoyang District Beijing 100015, CN
CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN/CN]; No.7 Yunhan Rd., Shuitu Hi-Tech Industrial Zone,, Beibei District Chongqing 400714, CN
Inventors:
JIA, Yukun; CN
WANG, Niannian; CN
WANG, Miao; CN
FAN, Dalin; CN
YANG, Fan; CN
ZHANG, Ge; CN
FENG, Zongrui; CN
Agent:
TEE&HOWE INTELLECTUAL PROPERTY ATTORNEYS; CHEN, Yuan 10th Floor, Tower D, Minsheng Financial Center 28 Jianguomennei Avenue, Dongcheng District Beijing 100005, CN
Priority Data:
201710756891.729.08.2017CN
Title (EN) METHOD FOR MANUFACTURING ARRAY SUBSTRATE, INTERMEDIATE ARRAY SUBSTRATE PRODUCT, AND ARRAY SUBSTRATE
(FR) PROCÉDÉ DE FABRICATION DE SUBSTRAT DE RÉSEAU, PRODUIT DE SUBSTRAT DE RÉSEAU INTERMÉDIAIRE ET SUBSTRAT DE RÉSEAU
Abstract:
(EN) An array substrate manufacturing method includes forming a plurality of first lead lines, a plurality of pixel electrodes (1), and a plurality of connecting lines (5) over a substrate (9). Each first lead line is insulated from any pixel electrode (1), and each connecting line (5) is insulated from any first lead line and is configured to electrically couple at least two pixel electrodes (1) such that a set of pixel electrodes (1) electrically coupled by each set of connecting lines (5) substantially form an equivalent lead line (S100). The method further includes detecting whether there is a short circuit between one equivalent lead line and a first lead line (S200), and severing each of the plurality of connecting lines (5) such that any two of the plurality of pixel electrodes (1) are not electrically coupled (S300).
(FR) Selon la présente invention, un procédé de fabrication de substrat de réseau consiste à former une pluralité de premières lignes conductrices, une pluralité d'électrodes de pixel (1) et une pluralité de lignes de connexion (5) sur un substrat (9). Chaque première ligne conductrice est isolée de toute électrode de pixel (1), et chaque ligne de connexion (5) est isolée de toute première ligne conductrice et est configurée de façon à coupler électriquement au moins deux électrodes de pixel (1) de telle sorte qu'un ensemble d'électrodes de pixel (1), couplées électriquement par chaque ensemble de lignes de connexion (5), forment sensiblement une ligne conductrice équivalente (S100). Le procédé consiste en outre à détecter s'il existe un court-circuit entre une ligne conductrice équivalente et une première ligne conductrice (S200), et à séparer chacune de la pluralité de lignes de connexion (5) de telle sorte que deux électrodes de pixel quelconques de la pluralité d'électrodes de pixel (1) ne sont pas couplées électriquement (S300).
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)