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1. (WO2019041858) ETCHING METHOD, METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, PROCESSING EQUIPMENT, AND DISPLAY DEVICE
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Pub. No.: WO/2019/041858 International Application No.: PCT/CN2018/084960
Publication Date: 07.03.2019 International Filing Date: 27.04.2018
IPC:
H01L 21/027 (2006.01) ,H01L 21/28 (2006.01) ,H01L 21/311 (2006.01) ,H01L 29/66 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
027
Making masks on semiconductor bodies for further photolithographic processing, not provided for in group H01L21/18 or H01L21/34165
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3105
After-treatment
311
Etching the insulating layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
Applicants:
京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No.10 Jiuxianqiao Rd. Chaoyang District Beijing 100015, CN
合肥鑫晟光电科技有限公司 HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN/CN]; 中国安徽省合肥市 新站区工业园内 Xinzhan Industrial Park Hefei, Anhui 230012, CN
Inventors:
杜生平 DU, Shengping; CN
苏同上 SU, Tongshang; CN
黄正峰 HUANG, Zhengfeng; CN
杨玉 YANG, Yu; CN
张旺 ZHANG, Wang; CN
王磊 WANG, Lei; CN
马云 MA, Yun; CN
刘丽华 LIU, Lihua; CN
刘广东 LIU, Guangdong; CN
郭稳 GUO, Wen; CN
Agent:
北京三高永信知识产权代理有限责任公司 BEIJING SAN GAO YONG XIN INTELLECTUAL PROPERTY AGENCY CO., LTD.; 中国北京市 海淀区学院路蓟门里和景园A座1单元102室 A-1-102,He Jing Yuan, Ji Men Li,Xueyuan Road Haidian District Beijing 100088, CN
Priority Data:
201710771004.331.08.2017CN
Title (EN) ETCHING METHOD, METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, PROCESSING EQUIPMENT, AND DISPLAY DEVICE
(FR) PROCÉDÉ DE GRAVURE, PROCÉDÉ DE FABRICATION DE TRANSISTOR À COUCHES MINCES, ÉQUIPEMENT DE TRAITEMENT ET DISPOSITIF D'AFFICHAGE
(ZH) 刻蚀方法、薄膜晶体管的制造方法、工艺设备、显示装置
Abstract:
(EN) The present disclosure relates to the field of semiconductor manufacturing and discloses an etching method, a method for manufacturing a thin film transistor, a processing equipment and a display device. The etching method comprises: forming a patterned photoresist layer on a surface of a material to be etched, the patterned photoresist layer exposing a region to be etched on the surface of the material to be etched; curing the photoresist layer by employing plasma processing; etching the material to be etched within the region to be etched by employing an etching liquid corresponding to the material to be etched. The present disclosure innovatively applies plasma processing which is often used for dry etching to wet etching and conversely uses the shortcoming wherein photoresist in dry etching is difficult to peel off due to degeneration after coming into contact with plasma, increasing the contact between the photoresist and a material to be etched by using plasma before an etching liquid reacts with the material to be etched, thus solving the problem of undercut that is caused by the foregoing and helping to improve product yield and product performance.
(FR) La présente invention porte sur le domaine de la fabrication de semi-conducteurs et concerne un procédé de gravure, un procédé de fabrication d'un transistor à couches minces, un équipement de traitement et un dispositif d'affichage. Le procédé de gravure comprend : la formation d'une couche de résine photosensible à motifs sur une surface d'un matériau à graver, la couche de résine photosensible à motifs exposant une région à graver sur la surface du matériau à graver ; le durcissement de la couche de résine photosensible au moyen d'un traitement au plasma ; la gravure du matériau à graver à l'intérieur de la région à graver en utilisant un liquide de gravure correspondant au matériau à graver. La présente invention applique de manière innovante un traitement au plasma qui est souvent utilisé pour les gravures sèches et humides et, inversement, utilise l'inconvénient selon lequel une résine photosensible dans une gravure sèche est difficile à décoller du fait de la dégénérescence après avoir été en contact avec le plasma, en augmentant le contact entre la résine photosensible et un matériau à graver en utilisant le plasma avant qu'un liquide de gravure réagisse avec le matériau à graver, ce qui permet de résoudre le problème de contre-dépouille qui est provoqué par ce qui précède et d'améliorer le rendement et les performances du produit.
(ZH) 本公开公开了一种刻蚀方法、薄膜晶体管的制造方法、工艺设备、显示装置,属于半导体制造领域。所述刻蚀方法包括:在待刻蚀材料的表面上形成经过图案化的光刻胶层,所述经过图案化的光刻胶层暴露出所述待刻蚀材料的表面上的待刻蚀区域;采用等离子体工艺对所述光刻胶层进行固化处理;采用与所述待刻蚀材料对应的刻蚀液刻蚀所述待刻蚀区域内的待刻蚀材料。本公开将常用于干法刻蚀的等离子体工艺创新地运用在了湿法刻蚀当中,并反过来利用了干法刻蚀中光刻胶容易在接触等离子体后发生变性而难以被剥离的缺点,在刻蚀液与待刻蚀材料反应之前利用等离子体增强光刻胶层与待刻蚀材料之间的接触,解决了由此而引发的钻刻问题,有助于提升产品良率和产品性能。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)