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1. (WO2019041476) ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
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Pub. No.: WO/2019/041476 International Application No.: PCT/CN2017/106966
Publication Date: 07.03.2019 International Filing Date: 20.10.2017
IPC:
G02F 1/1362 (2006.01)
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362
Active matrix addressed cells
Applicants:
武汉华星光电技术有限公司 WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN/CN]; 中国湖北省武汉市 东湖开发区高新大道666号生物城C5栋 Building C5 , Biolake of Optics Valley No. 666 Gaoxin Avenue East Lake High-tech Development Zone Wuhan, Hubei 430070, CN
Inventors:
郑力华 ZHENG, Lihua; CN
步欢欢 BU, Huanhuan; CN
杨攀 YANG, Pan; CN
Agent:
深圳市威世博知识产权代理事务所(普通合伙) CHINA WISPRO INTELLECTUAL PROPERTY LLP.; 中国广东省深圳市 南山区高新区粤兴三道8号中国地质大学产学研基地中地大楼A806 Room A806, Zhongdi Building China University of Geosciences Base No. 8 Yuexing 3rd Road, High-Tech Industrial Estate, Nanshan District Shenzhen, Guangdong 518057, CN
Priority Data:
201710767109.130.08.2017CN
Title (EN) ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
(FR) SUBSTRAT DE MATRICE ET SON PROCÉDÉ DE FABRICATION ASSOCIÉ ET PANNEAU D'AFFICHAGE
(ZH) 一种阵列基板及其制作方法、显示面板
Abstract:
(EN) An array substrate (91) and a manufacturing method thereof, and a display panel. The manufacturing method of the array substrate (91) comprises: (S41) providing a substrate (30); (S42) forming, sequentially on the substrate (30), a TFT function layer (31), a touch signal transmission line (32), a first insulation layer (33), a first electrode (34), and a second insulation layer (35), wherein the first electrode (34) serves as both a common electrode and a touch sensor; (S43) forming, on the second insulation layer (35) and by using a mask to perform an etching process, a first via (351) and a second via (352), wherein the first via (351) exposes the touch signal transmission line (32) and the first electrode (34), and the second via (352) exposes a source (317) and/or a drain (318) in the TFT function layer (31); and (S44) forming, on the second insulation layer (35), a second electrode (361) and a metal pattern (362), wherein the metal pattern (362) is connected to the touch signal transmission line (32) and the first electrode (34) by the first via (351), and the second electrode (361) is connected to the source (317) and/or the drain (318) by the second via (352). The invention reduces the number of steps in manufacturing an array substrate (91), thus reducing manufacturing costs thereof.
(FR) La présente invention concerne un substrat de matrice (91) et son procédé de fabrication et un panneau d’affichage. Le procédé de fabrication du substrat de matrice (91) consiste : (S41) à fournir un substrat (30) ; (S42) à former, de manière séquentielle sur le substrat (30), une couche de fonction TFT (31), une ligne de transmission de signal tactile (32), une première couche d'isolation (33), une première électrode (34) et une seconde couche d'isolation (35), la première électrode (34) servant à la fois d'électrode commune et de capteur tactile; (S43) à former, sur la seconde couche d'isolation (35) et à l'aide d'un masque pour effectuer un processus de gravure, un premier trou d'interconnexion (351) et un second trou d'interconnexion (352), le premier trou d'interconnexion (351) exposant la ligne de transmission de signal tactile (32) et la première électrode (34) et le second trou d'interconnexion (352) exposant une source (317) et/ou un drain (318) dans la couche de fonction TFT (31) ; et (S44) à former, sur la seconde couche d'isolation (35), une seconde électrode (361) et un motif métallique (362), le motif métallique (362) étant connecté à la ligne de transmission de signal tactile (32) et à la première électrode (34) par le premier trou d'interconnexion (351) et la seconde électrode (361) étant connectée à la source (317) et/ou au drain (318) par le second trou d'interconnexion (352). L'invention réduit le nombre d'étapes de fabrication d'un substrat de matrice (91), réduisant ainsi les coûts de fabrication de celui-ci.
(ZH) 一种阵列基板(91)及其制作方法、显示面板,其中,该阵列基板(91)的制作方法包括:(S41)提供一基板(30);(S42)在基板(30)上依次制作TFT功能层(31)、触控信号传输线(32)、第一绝缘层(33)、第一电极(34)、第二绝缘层(35);其中,第一电极(34)既用作公共电极,也用作触控传感器;(S43)在第二绝缘层(35)上采用一道光罩蚀刻形成第一过孔(351)和第二过孔(352);其中,第一过孔(351)使触控信号传输线(32)和第一电极(34)裸露,第二过孔(352)使TFT功能层(31)中的源极(317)和/或漏极(318)裸露;(S44)在第二绝缘层(35)上制作第二电极(361)和金属图案(362);其中,金属图案(362)通过第一过孔(351)连接触控信号传输线(32)和第一电极(34),第二电极(361)通过第二过孔(352)连接源极(317)和/或漏极(318)。通过该方式,能够减少阵列基板(91)的制程,从而减少阵列基板(91)的制作成本。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)