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1. (WO2019032376) CHARGE TRAP STRUCTURE WITH BARRIER TO BLOCKING REGION
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2019/032376 International Application No.: PCT/US2018/045015
Publication Date: 14.02.2019 International Filing Date: 02.08.2018
IPC:
H01L 27/11551 (2017.01) ,H01L 27/11524 (2017.01) ,H01L 27/11529 (2017.01) ,H01L 27/11578 (2017.01) ,H01L 27/1157 (2017.01) ,H01L 21/768 (2006.01)
[IPC code unknown for ERROR IPC Code incorrect: invalid subgroup (0=>999999)!][IPC code unknown for ERROR IPC Code incorrect: invalid subgroup (0=>999999)!][IPC code unknown for ERROR IPC Code incorrect: invalid subgroup (0=>999999)!][IPC code unknown for ERROR IPC Code incorrect: invalid subgroup (0=>999999)!][IPC code unknown for H01L 27/1157]
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
768
Applying interconnections to be used for carrying current between separate components within a device
Applicants:
MICRON TECHNOLOGY, INC. [US/US]; 8000 So. Federal Way Boise, Idaho 83716-9632, US
Inventors:
CARLSON, Chris M.; US
Agent:
PERDOK, Monique M.; US
ARORA, Suneel; US
BEEKMAN, Marvin L.; US
BLACK, David W.; US
SCHEER, Bradley W.; US
Priority Data:
15/675,22311.08.2017US
Title (EN) CHARGE TRAP STRUCTURE WITH BARRIER TO BLOCKING REGION
(FR) STRUCTURE DE PIÈGE À CHARGES COMPRENANT UNE BARRIÈRE À UNE ZONE DE BLOCAGE
Abstract:
(EN) Various embodiments, disclosed herein, include methods and apparatus having charge trap structures, where each charge trap structure includes a dielectric barrier between a gate and a blocking dielectric on a charge trap region of the charge trap structure. In various embodiments, material of the dielectric barrier of each of the charge trap structures may have a dielectric constant greater than that of aluminum oxide. Additional apparatus, systems, and methods are disclosed.
(FR) Divers modes de réalisation de la présente invention concernent des procédés et un appareil comprenant des structures de piège à charges, chaque structure de piège à charges comprenant une barrière diélectrique entre une grille et un diélectrique de blocage sur une zone de piège à charges de la structure de piège à charges. Dans divers modes de réalisation, le matériau de la barrière diélectrique de chacune des structures de piège à charges peut avoir une constante diélectrique supérieure à celle de l'oxyde d'aluminium. La présente invention concerne en outre un appareil, des systèmes et des procédés supplémentaires.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)