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1. (WO2019029819) INTEGRATED CIRCUIT WITH CLOCK DISTRIBUTION
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2019/029819 International Application No.: PCT/EP2017/070425
Publication Date: 14.02.2019 International Filing Date: 11.08.2017
IPC:
H03K 5/13 (2014.01) ,H04B 1/04 (2006.01) ,G06F 1/10 (2006.01) ,G06F 1/06 (2006.01)
H ELECTRICITY
03
BASIC ELECTRONIC CIRCUITRY
K
PULSE TECHNIQUE
5
Manipulating pulses not covered by one of the other main groups in this subclass
13
Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
B
TRANSMISSION
1
Details of transmission systems, not covered by a single one of groups H04B3/-H04B13/123; Details of transmission systems not characterised by the medium used for transmission
02
Transmitters
04
Circuits
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
04
Generating or distributing clock signals or signals derived directly therefrom
10
Distribution of clock signals
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
1
Details not covered by groups G06F3/-G06F13/82
04
Generating or distributing clock signals or signals derived directly therefrom
06
Clock generators producing several clock signals
Applicants:
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) [SE/SE]; SE-164 83 Stockholm, SE
Inventors:
ELGAARD, Christian; SE
ÅSTRÖM, Magnus; SE
TILLMAN, Fredrik; SE
Agent:
ERICSSON; Patent Development Torshamnsgatan 21-23 164 80 STOCKHOLM, SE
Priority Data:
Title (EN) INTEGRATED CIRCUIT WITH CLOCK DISTRIBUTION
(FR) CIRCUIT INTÉGRÉ À DISTRIBUTION D'HORLOGE
Abstract:
(EN) An integrated circuit (10, 10a-d) is disclosed, which is configured to be connected to an antenna module (3) having multiple antenna elements (17). The integrated circuit (10, 10a-d) comprises a plurality of communications circuits (50j), each of which is configured to be connected to an antenna element (17) of the antenna module (3). It also comprises a first clock input terminal (551) configured to receive a reference clock signal from outside the integrated circuit (10, 10a-d) and a first clock-distribution network (601) connected between the first clock input terminal (551) and a first subset (651) of the communication circuits (50j). Furthermore, it comprises a second clock input terminal (552) configured to receive a reference clock signal from outside the integrated circuit (10, 10a-d) and a second clock-distribution network (601) connected between the second clock input terminal (552) and a second subset (652) of the communication circuits (50j).
(FR) La présente invention concerne un circuit intégré (10, 10a-d) qui est conçu pour être connecté à un module d'antenne (3) ayant de multiples éléments d'antenne (17). Le circuit intégré (10, 10a-d) comprend une pluralité de circuits de communication (50 j ), chacun d'eux étant conçu pour être connecté à un élément d'antenne (17) du module d'antenne (3). Il comprend également une première borne d'entrée d'horloge (551) conçue pour recevoir un signal d'horloge de référence provenant de l'extérieur du circuit intégré (10, 10a-d) et un premier réseau de distribution d'horloge (601) connecté entre la première borne d'entrée d'horloge (551) et un premier sous-ensemble (651) des circuits de communication (50 j ). En outre, il comprend une seconde borne d'entrée d'horloge (552) conçue pour recevoir un signal d'horloge de référence provenant de l'extérieur du circuit intégré (10, 10a-d) et un second réseau de distribution d'horloge (601) connecté entre la seconde borne d'entrée d'horloge (552) et un second sous-ensemble (652) des circuits de communication (50 j ).
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)