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1. (WO2019027902) FLASH-LAMP ANNEALING METHOD OF MAKING POLYCRYSTALLINE SILICON
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Pub. No.: WO/2019/027902 International Application No.: PCT/US2018/044383
Publication Date: 07.02.2019 International Filing Date: 30.07.2018
IPC:
H01L 21/20 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
Applicants:
HIRSCHMAN, Karl D. [US/US]; US
MANLEY, Robert George [US/US]; US
MUDGAL, Tarun [IN/US]; US
CORNING INCORPORATED [US/US]; One Riverfront Plaza Corning, New York 14831, US
Inventors:
HIRSCHMAN, Karl D.; US
MANLEY, Robert George; US
MUDGAL, Tarun; US
Agent:
PATHAK, Shantanu C.; US
Priority Data:
62/539,04231.07.2017US
Title (EN) FLASH-LAMP ANNEALING METHOD OF MAKING POLYCRYSTALLINE SILICON
(FR) PROCÉDÉ DE RECUIT PAR LAMPE FLASH PERMETTANT DE FABRIQUER DU SILICIUM POLYCRISTALLIN
Abstract:
(EN) A method of making polycrystalline silicon (p-Si), including: depositing amorphous silicon to produce an amorphous silicon super-mesa; dehydrogenating the amorphous silicon; patterning the super-mesa to produce a patterned substrate; depositing a capping oxide layer on the amorphous silicon on the patterned substrate; heating the capped, patterned substrate to the crystallization temperature of the a-Si; and flash lamp annealing the patterned substrate with a xenon lamp to produce p-Si having at least one super-mesa, and the super-mesa having supersized grains. Also disclosed are p-Si articles and devices incorporating the articles, and an apparatus for making the p-Si articles.
(FR) La présente invention concerne un procédé de fabrication de silicium polycristallin (p-Si), consistant : à déposer du silicium amorphe pour produire un super mesa en silicium amorphe ; à déshydrogéner le silicium amorphe ; à former les motifs sur le super mesa pour produire un substrat à motifs ; à déposer une couche d'oxyde de recouvrement sur le silicium amorphe sur le substrat à motifs ; à chauffer le substrat à motifs recouvert à la température de cristallisation du a-Si ; et à recuire par lampe flash du substrat à motifs avec une lampe au xénon pour produire du p-Si ayant au moins un super mesa, et le super mesa ayant des grains surdimensionnés. La présente invention porte également sur des articles à base de p-Si et sur des dispositifs incorporant les articles, ainsi que sur un appareil permettant de fabriquer les articles à base de p-Si.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)