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1. (WO2019027799) MEMORY DEVICES WITH READ LEVEL CALIBRATION
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Pub. No.: WO/2019/027799 International Application No.: PCT/US2018/043876
Publication Date: 07.02.2019 International Filing Date: 26.07.2018
IPC:
G11C 16/26 (2006.01) ,G11C 16/08 (2006.01) ,G06F 11/07 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
26
Sensing or reading circuits; Data output circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
08
Address circuits; Decoders; Word-line control circuits
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
Applicants:
MICRON TECHNOLOGY, INC. [US/US]; 8000 S. Federal Way, P.O. Box 6 Boise, ID 83707-0006, US
Inventors:
BESINGA, Gary, F.; US
FEI, Peng; US
MILLER, Michael, G.; US
AWUSIE, Roland, J.; US
MUCHHERLA, Kishore, Kumar; US
PADILLA, Renato, C.; US
SINGIDI, Harish, R.; US
HOEI, Jung, Sheng; US
ALSASUA, Gianni, S.; US
Agent:
PARKER, Paul, T.; US
ARNETT, Stephen, E.; US
BAKER, Theodore, W.; US
BRAIRTON, Scott; US
DUNHAM, Nicole, S.; US
Priority Data:
15/669,05504.08.2017US
Title (EN) MEMORY DEVICES WITH READ LEVEL CALIBRATION
(FR) DISPOSITIFS DE MÉMOIRE À ÉTALONNAGE DE NIVEAU DE LECTURE
Abstract:
(EN) Several embodiments of memory devices and systems with read level calibration are disclosed herein. In one embodiment, a memory device includes a controller operably coupled to a main memory having at least one memory region and calibration circuitry. The calibration circuitry is operably coupled to the at least one memory region and is configured to determine a read level offset value corresponding to a read level signal of the at least one memory region. In some embodiments, the calibration circuitry is configured to obtain the read level offset value internal to the main memory. The calibration circuitry is further configured to output the read level offset value to the controller.
(FR) Selon plusieurs modes de réalisation, l'invention concerne des dispositifs et des systèmes de mémoire à étalonnage de niveau de lecture. Selon un mode de réalisation, un dispositif de mémoire comprend un dispositif de commande couplé de manière fonctionnelle à une mémoire principale comportant au moins une région de mémoire et un circuit d'étalonnage. Le circuit d'étalonnage est couplé de manière fonctionnelle à la ou aux régions de mémoire et est configuré pour déterminer une valeur de décalage de niveau de lecture correspondant à un signal de niveau de lecture de la ou des régions de mémoire. Selon certains modes de réalisation, le circuit d'étalonnage est configuré pour obtenir la valeur de décalage de niveau de lecture interne à la mémoire principale. Le circuit d'étalonnage est en outre configuré pour délivrer en sortie la valeur de décalage de niveau de lecture au dispositif de commande.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)