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1. (WO2019027305) METHOD FOR MANUFACTURING ULTRASONIC FINGERPRINT SENSOR BY USING NANOROD STRUCTURE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/027305 International Application No.: PCT/KR2018/008914
Publication Date: 07.02.2019 International Filing Date: 06.08.2018
IPC:
H01L 41/113 (2006.01) ,G06K 9/00 (2006.01) ,H01L 41/18 (2006.01) ,H01L 41/047 (2006.01) ,H01L 29/06 (2006.01) ,H01L 21/56 (2006.01) ,H01L 21/28 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
08
Piezo-electric or electrostrictive elements
113
with mechanical input and electrical output
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
K
RECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
9
Methods or arrangements for reading or recognising printed or written characters or for recognising patterns, e.g. fingerprints
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
16
Selection of materials
18
for piezo-electric or electrostrictive elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
Details
04
of piezo-electric or electrostrictive elements
047
Electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56
Encapsulations, e.g. encapsulating layers, coatings
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
Applicants:
한국산업기술대학교산학협력단 KOREA POLYTECHNIC UNIVERSITY INDUSTRY ACADEMIC COOPERATION FOUNDATION [KR/KR]; 경기도 시흥시 산기대학로 237 (정왕동, 한국산업기술대학교) (Jeongwang-dong, KOREA POLYTECHNIC UNIVERSITY)237, Sangidaehak-ro, Siheung-si, Gyeonggi-do Gyeonggi-do 15073, KR
Inventors:
김경국 KIM, Kyoung Kook; KR
Agent:
강태훈 KANG, Tae Hoon; KR
나선균 NA, Sun Kyoon; KR
방영석 BAHNG, Young Suk; KR
Priority Data:
10-2017-009920204.08.2017KR
10-2018-009137706.08.2018KR
Title (EN) METHOD FOR MANUFACTURING ULTRASONIC FINGERPRINT SENSOR BY USING NANOROD STRUCTURE
(FR) PROCÉDÉ DE FABRICATION D'UN CAPTEUR D'EMPREINTES DIGITALES ULTRASONORE AU MOYEN D'UNE STRUCTURE À NANOTIGES
(KO) 나노로드 구조를 이용한 초음파 지문센서의 제조방법
Abstract:
(EN) The present invention relates to a method for manufacturing an ultrasonic fingerprint sensor by using a nanorod structure, the method comprising: a conductive mold generating step of etching a conductive substrate so as to generate a plurality of rod generating holes spaced apart by a predetermined interval; a nanorod generating step of filling the plurality of rod generating holes with a nano piezoelectric material so as to generate nanorods; a side electrode generating portion indicating step of marking side electrode generating portions on conductive mold edge portions on one sides of the rod generating holes; a conductive mold etching step of primarily etching the remaining conductive mold, excluding the nanorods, the marked side electrode generating portions, and the conductive substrate base connecting the same, so as to generate nanorods and side electrodes; an insulating material filling step of filling parts etched through the conductive mold etching step with an insulating material; a lower electrode forming step of conducting secondary etching so as to expose first end portions of the nanorods and of the side electrodes, which are surrounded by the insulating material through the insulating material filling, and forming lower electrodes on the exposed first end portions of the nanorods and of the side electrodes; a dummy substrate attaching step of attaching a dummy substrate to the surface on which the lower electrodes are formed; and an upper electrode forming step of forming upper electrodes on second end portions of the nanorods and of the side electrodes, which are exposed by removing the conductive substrate base connecting the nanorods and the side electrodes.
(FR) La présente invention concerne un procédé de fabrication d'un capteur d'empreintes digitales ultrasonore au moyen d'une structure à nanotiges. Le procédé comprend : une étape de production de moule conducteur consistant à graver un substrat conducteur de façon à produire plusieurs trous de production de tige espacés par un intervalle prédéfini; une étape de production de nanotiges consistant à remplir plusieurs trous de production de tige avec un matériau nanopiézoélectrique afin de produire des nanotiges; une étape d'indication de partie de production d'électrode latérale consistant à marquer des parties de production d'électrode latérale sur des parties de bord de moule conducteur sur un côté des trous de production de tige; une étape de gravure de moule conducteur consistant principalement à graver le moule conducteur restant, à l'exception des nanotiges, les parties marquées de production d'électrode latérale et la base du substrat conducteur et à les relier, afin de produire des nanotiges et des électrodes latérales; une étape de remplissage de matériau isolant consistant à remplir des parties gravées à l'étape de gravure de moule conducteur avec un matériau isolant; une étape de formation d'électrode inférieure consistant à réaliser une gravure secondaire afin de découvrir des premières parties d'extrémité des nanotiges et des électrodes latérales, qui sont entourées par le matériau isolant au moyen du remplissage de matériau isolant, et à former des électrodes inférieures sur les premières parties d'extrémité découvertes des nanotiges et des électrodes latérales; une étape de fixation de substrat factice consistant à fixer un substrat factice sur la surface sur laquelle les électrodes inférieures sont formées; et une étape de formation d'électrode supérieure consistant à former des électrodes supérieures sur des secondes parties d'extrémité des nanotiges et des électrodes latérales, qui sont découvertes par retrait de la base du substrat conducteur reliant les nanotiges et les électrodes latérales.
(KO) 본 발명은 전도성 기판을 식각하여 일정 간격으로 이격된 복수의 로드 생성홀들을 생성하는 전도성 몰드 생성단계, 상기 복수의 로드 생성홀들에 나노 압전물질을 충진하여 나노로드들을 생성하는 나노로드 생성단계, 상기 로드 생성홀 일측의 상기 전도성 몰드 테두리부에 측면전극 생성부를 마킹하는 측면전극 생성부 표시단계, 상기 나노로드와 상기 마킹된 측면전극 생성부 및 이들을 연결하는 전도성 기판 베이스를 제외하고, 나머지 전도성 몰드를 1차 식각하여 나노로드와 측면전극을 생성하는 전도성 몰드 식각단계, 상기 전도성 몰드 식각단계를 통해 식각된 부분에 절연재를 충진하는 절연재 충진단계, 상기 절연재의 충진에 의해 절연재로 둘러싸인 상기 나노로드 및 측면전극의 일단부가 노출되도록 2차 식각하고, 노출된 나노로드 및 측면전극의 일단부에 하부전극을 형성하는 하부전극 형성단계, 상기 하부전극이 형성된 표면에 더미기판(dummy substrate)을 접착하는 더미기판 접착단계 및 상기 나노로드와 측면전극을 연결하는 상기 전도성 기판 베이스를 제거하여 노출된 상기 나노로드와 측면전극의 타단부에 상부전극을 형성하는 상부전극 형성단계를 포함하는 나노로드 구조를 이용한 초음파 지문센서의 제조방법에 관한 것이다.
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African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)