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1. (WO2019026917) LEAD FRAME, SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
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Pub. No.: WO/2019/026917 International Application No.: PCT/JP2018/028701
Publication Date: 07.02.2019 International Filing Date: 31.07.2018
IPC:
H01L 23/50 (2006.01) ,B21B 1/22 (2006.01) ,B21B 3/00 (2006.01) ,H01L 21/52 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
50
for integrated circuit devices
B PERFORMING OPERATIONS; TRANSPORTING
21
MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL; PUNCHING METAL
B
ROLLING OF METAL
1
Metal rolling methods or mills for making semi-finished products of solid or profiled cross-section; Sequence of operations in milling trains; Layout of rolling-mill plant, e.g. grouping of stands; Succession of passes or of sectional pass alternations
22
for rolling bands or sheets of indefinite length
B PERFORMING OPERATIONS; TRANSPORTING
21
MECHANICAL METAL-WORKING WITHOUT ESSENTIALLY REMOVING MATERIAL; PUNCHING METAL
B
ROLLING OF METAL
3
Rolling materials of special alloys so far as the composition of the alloy requires or permits special rolling methods or sequences
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
52
Mounting semiconductor bodies in containers
Applicants:
大日本印刷株式会社 DAI NIPPON PRINTING CO., LTD. [JP/JP]; 東京都新宿区市谷加賀町一丁目1番1号 1-1, Ichigaya-kaga-cho 1-chome, Shinjuku-ku, Tokyo 1628001, JP
Inventors:
大貫 正雄 OONUKI Masao; JP
山嵜 剛 YAMAZAKI Tsuyoshi; JP
大内 一範 OOUCHI Kazunori; JP
矢崎 雅樹 YAZAKI Masaki; JP
永田 昌博 NAGATA Masahiro; JP
Agent:
永井 浩之 NAGAI Hiroshi; JP
中村 行孝 NAKAMURA Yukitaka; JP
佐藤 泰和 SATO Yasukazu; JP
朝倉 悟 ASAKURA Satoru; JP
堀田 幸裕 HOTTA Yukihiro; JP
村田 卓久 MURATA Takahisa; JP
Priority Data:
2017-14845831.07.2017JP
2017-15691515.08.2017JP
2017-17045605.09.2017JP
Title (EN) LEAD FRAME, SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
(FR) GRILLE DE CONNEXION, DISPOSITIF SEMICONDUCTEUR ET PROCÉDÉ DE PRODUCTION DE DISPOSITIF SEMICONDUCTEUR
(JA) リードフレーム、半導体装置および半導体装置の製造方法
Abstract:
(EN) This lead frame is provided with: a die pad; a plurality of long lead parts and a plurality of short lead parts, which are arranged around the die pad; and a connection bar to which the plurality of long lead parts and the plurality of short lead parts are connected. The long lead parts and the short lead parts are alternately arranged in the longitudinal direction of the connection bar. Long lead connection portions of the connection bar, to which the long lead parts are connected, are at least partially thinned from the back surface side; and short lead connection portions of the connection bar, to which the short lead parts are connected, are at least partially thinned from the front surface side.
(FR) L'invention concerne une grille de connexion comprenant : un plot de puce ; une pluralité de parties de conducteur long et une pluralité de parties de conducteur court, disposées autour du plot de puce ; et une barre de connexion à laquelle sont connectées la pluralité de parties de conducteur long et la pluralité de parties de conducteur court. Les parties de conducteur long et les parties de conducteur court sont disposées alternées dans le sens de la longueur de la barre de connexion. Des parties de connexion de conducteur long de la barre de connexion, auxquelles sont connectées les parties de conducteur long, sont au moins partiellement amincies à partir du côté de surface arrière ; et des parties de connexion de conducteur court de la barre de connexion, auxquelles sont connectées les parties de conducteur court, sont au moins partiellement amincies à partir du côté de surface avant.
(JA) リードフレームは、ダイパッドと、ダイパッドの周囲に設けられた、複数の長リード部および複数の短リード部と、複数の長リード部および複数の短リード部が連結されたコネクティングバーとを備えている。長リード部と短リード部とは、コネクティングバーの長手方向に沿って交互に配置されている。コネクティングバーのうち、長リード部が連結された長リード連結部は、少なくとも部分的に裏面側から薄肉化され、コネクティングバーのうち、短リード部が連結された短リード連結部は、少なくとも部分的に表面側から薄肉化されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)