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1. (WO2019026834) CERAMIC CIRCUIT BOARD
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Pub. No.: WO/2019/026834 International Application No.: PCT/JP2018/028422
Publication Date: 07.02.2019 International Filing Date: 30.07.2018
IPC:
H05K 1/02 (2006.01) ,H01L 23/12 (2006.01) ,H01L 23/36 (2006.01) ,H05K 1/03 (2006.01) ,H05K 1/09 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
34
Arrangements for cooling, heating, ventilating or temperature compensation
36
Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
03
Use of materials for the substrate
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
09
Use of materials for the metallic pattern
Applicants:
デンカ株式会社 DENKA COMPANY LIMITED [JP/JP]; 東京都中央区日本橋室町二丁目1番1号 1-1, Nihonbashi-Muromachi 2-chome, Chuo-ku, Tokyo 1038338, JP
Inventors:
酒井 篤士 SAKAI Atsushi; JP
広津留 秀樹 HIROTSURU Hideki; JP
市川 恒希 ICHIKAWA Kohki; JP
谷口 佳孝 TANIGUCHI Yoshitaka; JP
Agent:
長谷川 芳樹 HASEGAWA Yoshiki; JP
清水 義憲 SHIMIZU Yoshinori; JP
中塚 岳 NAKATSUKA Takeshi; JP
Priority Data:
2017-15188804.08.2017JP
Title (EN) CERAMIC CIRCUIT BOARD
(FR) CARTE DE CIRCUIT IMPRIMÉ EN CÉRAMIQUE
(JA) セラミックス回路基板
Abstract:
(EN) A ceramic circuit board which is provided with a ceramic substrate 1 and metal layers 2a, 2b that are arranged on both surfaces of the ceramic substrate 1 and contain Al and/or Cu. This ceramic circuit board is configured such that: the measured value α1 of the linear thermal expansion coefficient over the range of from 25°C to 150°C is from 5 × 10-6/K to 9 × 10-6/K; the ratio of the measured value α1 to the theoretical value α2 of the linear thermal expansion coefficient over the range of from 25°C to 150°C, namely α1/α2 is from 0.7 to 0.95; and at least one of the metal layers 2a, 2b forms a metal circuit.
(FR) L'invention concerne une carte de circuit imprimé en céramique qui comprend un substrat en céramique (1) et des couches métalliques (2a, 2b), qui sont aménagées sur les deux surfaces du substrat en céramique (1) et contiennent de l'Al et/ou du Cu. Cette carte de circuit imprimé en céramique est conçue de sorte que : la valeur mesurée α1 du coefficient de dilatation thermique linéaire dans la plage de 25 °C à 150 °C est comprise entre 5 × 10-6/K et 9 × 10-6/K ; le rapport de la valeur mesurée α1 sur la valeur théorique α2 du coefficient de dilatation thermique linéaire dans la plage de 25 °C à 150 °C, à savoir α1/α2, est comprise entre 0,7 et 0,95 ; et au moins une des couches métalliques (2a, 2b) forme un circuit métallique.
(JA) セラミックス基材1と、セラミックス基材1の両面に設けられ、Al及び/又はCuを含む金属層2a,2bと、を備え、25℃~150℃における線熱膨張係数の測定値α1が5×10-6~9×10-6/Kであり、25℃~150℃における線熱膨張係数の理論値α2に対する前記α1の比α1/α2が0.7~0.95であり、金属層2a,2bのうちの少なくとも一方が金属回路を形成している、セラミックス回路基板。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)