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1. (WO2019026704) THIN FILM TRANSISTOR SUBSTRATE, LIQUID CRYSTAL DISPLAY DEVICE PROVIDED WITH SAME, AND METHOD FOR PRODUCING THIN FILM TRANSISTOR SUBSTRATE
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Pub. No.: WO/2019/026704 International Application No.: PCT/JP2018/027789
Publication Date: 07.02.2019 International Filing Date: 25.07.2018
IPC:
H01L 29/786 (2006.01) ,G02F 1/1368 (2006.01) ,H01L 21/28 (2006.01) ,H01L 21/336 (2006.01) ,H01L 29/417 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362
Active matrix addressed cells
1368
in which the switching element is a three-electrode device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
417
carrying the current to be rectified, amplified or switched
Applicants:
シャープ株式会社 SHARP KABUSHIKI KAISHA [JP/JP]; 大阪府堺市堺区匠町1番地 1, Takumi-cho, Sakai-ku, Sakai City, Osaka 5908522, JP
Inventors:
美▲崎▼ 克紀 MISAKI, Katsunori; --
Agent:
特許業務法人 安富国際特許事務所 YASUTOMI & ASSOCIATES; 大阪府大阪市淀川区宮原3丁目5番36号 5-36, Miyahara 3-chome, Yodogawa-ku, Osaka-shi, Osaka 5320003, JP
Priority Data:
2017-14926501.08.2017JP
Title (EN) THIN FILM TRANSISTOR SUBSTRATE, LIQUID CRYSTAL DISPLAY DEVICE PROVIDED WITH SAME, AND METHOD FOR PRODUCING THIN FILM TRANSISTOR SUBSTRATE
(FR) SUBSTRAT DE TRANSISTOR À COUCHES MINCES, DISPOSITIF D'AFFICHAGE À CRISTAUX LIQUIDES LE COMPRENANT ET PROCÉDÉ DE PRODUCTION DE SUBSTRAT DE TRANSISTOR À COUCHES MINCES
(JA) 薄膜トランジスタ基板及びそれを備えた液晶表示装置並びに薄膜トランジスタ基板の製造方法
Abstract:
(EN) The present invention provides: a thin film transistor substrate which is able to have an improved yield and enables an electrode to have a lower resistance; a liquid crystal display device which is provided with this thin film transistor substrate; and a method for producing a thin film transistor substrate. The present invention is a thin film transistor substrate which is provided with: a thin film transistor that has a base substrate, a source electrode and a drain electrode; and a protective insulating film that is arranged so as to cover the thin film transistor and is formed from silicon oxide. Each of the source electrode and the drain electrode comprises: a laminate that is obtained by sequentially laminating an aluminum layer and a molybdenum nitride layer; and a titanium nitride/titanium layer that covers the laminate.
(FR) La présente invention concerne : un substrat de transistor à couches minces qui peut avoir un rendement amélioré et permet à une électrode d'avoir une résistance inférieure; un dispositif d'affichage à cristaux liquides qui comprend ce substrat de transistor à couches minces; et un procédé de production d'un substrat de transistor à couches minces. La présente invention concerne un substrat de transistor à couches minces qui comprend : un transistor à couches minces qui a un substrat de base, une électrode de source et une électrode de drain; et un film isolant de protection qui est agencé de façon à recouvrir le transistor à couches minces et est formé à partir d'oxyde de silicium. Chacune de l'électrode de source et de l'électrode de drain comprend : un stratifié qui est obtenu par stratification séquentielle d'une couche d'aluminium et d'une couche de nitrure de molybdène; et une couche de titane titane/nitrure qui recouvre le stratifié.
(JA) 本発明は、歩留まりを向上でき、電極の低抵抗化が可能な薄膜トランジスタ基板及びそれを備えた液晶表示装置並びに薄膜トランジスタ基板の製造方法を提供する。 本発明は、ベース基板と、ソース電極及びドレイン電極を有する薄膜トランジスタと、薄膜トランジスタを覆うように設けられた酸化シリコンからなる保護絶縁膜とを備えた薄膜トランジスタ基板であって、ソース電極及び前記ドレイン電極は、各々、アルミニウム層及び窒化モリブデン層が順に積層された積層体と、積層体を被覆する窒化チタン/チタン層とを有する薄膜トランジスタ基板である。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)