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1. (WO2019025917) SEMICONDUCTOR DEVICE, AND DISPLAY DEVICE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/025917 International Application No.: PCT/IB2018/055617
Publication Date: 07.02.2019 International Filing Date: 27.07.2018
IPC:
H01L 21/336 (2006.01) ,G02F 1/1368 (2006.01) ,G09F 9/30 (2006.01) ,H01L 27/32 (2006.01) ,H01L 29/786 (2006.01) ,H01L 51/50 (2006.01) ,H05B 33/14 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362
Active matrix addressed cells
1368
in which the switching element is a three-electrode device
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
F
DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9
Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30
in which the desired character or characters are formed by combining individual elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
28
including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
32
with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
50
specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
12
Light sources with substantially two-dimensional radiating surfaces
14
characterised by the chemical or physical composition or the arrangement of the electroluminescent material
Applicants:
株式会社半導体エネルギー研究所 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP/JP]; 神奈川県厚木市長谷398 398, Hase, Atsugi-shi, Kanagawa 2430036, JP
Inventors:
山崎舜平 YAMAZAKI, Shunpei; JP
島行徳 SHIMA, Yukinori; --
神長正美 JINTYOU, Masami; --
Priority Data:
2017-15123604.08.2017JP
Title (EN) SEMICONDUCTOR DEVICE, AND DISPLAY DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET DISPOSITIF D’AFFICHAGE
(JA) 半導体装置、及び表示装置
Abstract:
(EN) Provided is a semiconductor device which can be made highly integrated. The semiconductor device includes a semiconductor layer, a first insulation layer, a second insulation layer, a third insulation layer, and a first conductive layer. The third insulation layer is positioned above the semiconductor layer and includes an opening above the semiconductor layer. The first conductive layer is positioned above the semiconductor layer, the first insulation layer is positioned between the first conductive layer and the semiconductor layer, and the second insulation layer is provided in a position in contact with the semiconductor layer, the first insulation layer and a side surface of the first opening. The semiconductor layer includes: a first portion overlapping the first insulation layer; a pair of second portions sandwiching the first portion, and overlapping the second insulation layer; and a pair of third portions sandwiching the first portion and the pair of second portions, and not overlapping either of the first insulation layer or the second insulation layer. The first portion has a width smaller than the width of the first opening, and has a shape in which the film thickness of the semiconductor layer is thinner than in the second portions, and the second portions have a shape in which the film thickness of the semiconductor layer is thinner than in the third portions.
(FR) La présente invention concerne un dispositif à semi-conducteur qui peut être rendu hautement intégré. Le dispositif à semi-conducteur comprend une couche semi-conductrice, une première couche isolante, une seconde couche isolante, une troisième couche isolante et une première couche conductrice. La troisième couche isolante est positionnée au-dessus de la couche semi-conductrice et comprend une ouverture au-dessus de la couche semi-conductrice. La première couche conductrice est positionnée au-dessus de la couche semi-conductrice, la première couche isolante est positionnée entre la première couche conductrice et la couche semi-conductrice, et la seconde couche isolante est disposée dans une position en contact avec la couche semi-conductrice, la première couche isolante et une surface latérale de la première ouverture. La couche semi-conductrice comprend : une première partie chevauchant la première couche isolante; une paire de secondes parties prenant en sandwich la première partie, et chevauchant la seconde couche isolante; et une paire de troisièmes parties prenant en sandwich la première partie et la paire de secondes parties, et ne chevauchant pas l'une ou l'autre de la première couche isolante ou de la seconde couche isolante. La première partie a une largeur inférieure à la largeur de la première ouverture, et a une forme dans laquelle l'épaisseur de film de la couche semi-conductrice est plus mince que dans les secondes parties, et les secondes parties ont une forme dans laquelle l'épaisseur de film de la couche semi-conductrice est plus mince que dans les troisièmes parties.
(JA) 要約書 高集積化が可能な半導体装置を提供する。 半導体装置は、半導体層、第1の絶縁層、第2の絶縁層、第3の絶縁層、及び第1の導電層を有する。 第3の絶縁層は、 半導体層上に位置し、 さらに半導体層上に第1の開口を有し、 第1の導電層は、 半 導体層上に位置し、第1の絶縁層は、第1の導電層と、半導体層との間に位置し、第2の絶縁層は、 第1の開口の側面と、 半導体層と、 第1の絶縁層と接する位置に設けられる。 半導体層は、 第1の絶 縁層と重なる第1の部分と、 第1の部分を挟み、 且つ第2の絶縁層と重なる一対の第2の部分と、 第 1の部分及び一対の第2の部分を挟み、且つ第1の絶縁層及び第2の絶縁層のいずれにも重ならない 一対の第3の部分とを有する。 第1の部分は、 第1の開口の幅よりも小さい幅を有し、 また、 半導体 層が第2の部分より膜厚が薄い形状を有し、 第2の部分は、 半導体層が第3の部分より膜厚が薄い形 状を有する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)