Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2019025451) METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/025451 International Application No.: PCT/EP2018/070757
Publication Date: 07.02.2019 International Filing Date: 31.07.2018
IPC:
H01L 33/22 (2010.01) ,H01L 33/44 (2010.01) ,H01L 33/52 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
20
with a particular shape, e.g. curved or truncated substrate
22
Roughened surfaces, e.g. at the interface between epitaxial layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
44
characterised by the coatings, e.g. passivation layer or anti-reflective coating
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
52
Encapsulations
Applicants:
OSRAM OPTO SEMICONDUCTORS GMBH [DE/DE]; Leibnizstr. 4 93055 Regensburg, DE
Inventors:
LEISEN, Daniel; DE
BRUNNER, Herbert; DE
DINU, Emilia; DE
EBERHARD, Jens; DE
KEITH, Christina; DE
PINDL, Markus; null
REESWINKEL, Thomas; DE
RICHTER, Daniel; DE
Agent:
PATENTANWALTSKANZLEI WILHELM & BECK; Prinzenstr. 13 80639 München, DE
Priority Data:
10 2017 117 425.701.08.2017DE
Title (EN) METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT
(FR) PROCÉDÉ DE FABRICATION D'UN COMPOSANT OPTOÉLECTRONIQUE
(DE) VERFAHREN ZUM HERSTELLEN EINES OPTOELEKTRONISCHEN BAUELEMENTS
Abstract:
(EN) In a method for producing an optoelectronic component, a carrier having a top side is provided. An optoelectronic semiconductor chip is arranged above the top side of the carrier. Furthermore, a potting material is arranged above the top side of the carrier, wherein the optoelectronic semiconductor chip is embedded into the potting material. The potting material forms a potting surface. Particles are sprayed onto the potting surface, wherein a portion of the particles remains at the potting surface, wherein a topography is produced at the potting surface.
(FR) L'invention concerne un procédé de fabrication d'un composant optoélectronique, selon lequel un support présentant une face supérieure est fourni. Une puce à semi-conducteur optoélectronique est disposée au-dessus de la face supérieure du support. Une matière d’enrobage est également disposée au-dessus de la face supérieure dudit support, la puce à semi-conducteur optoélectronique étant noyée dans ladite matière d’enrobage. Cette matière d'enrobage forme une surface d’enrobage. Des particules sont pulvérisées sur la surface d’enrobage, une partie des particules restant sur la surface d’enrobage, une topographie étant ainsi créée au niveau de ladite surface d’enrobage.
(DE) Bei einem Verfahren zum Herstellen eines optoelektronischen Bauelements wird ein Träger mit einer Oberseite bereitgestellt. Über der Oberseite des Trägers wird ein optoelektronischer Halbleiterchip angeordnet. Weiterhin wird über der Oberseite des Trägers ein Vergussmaterial angeordnet, wobei der optoelektronische Halbleiterchip in das Vergussmaterial eingebettet wird. Das Vergussmaterial bildet eine Vergussoberfläche. Auf die Vergussoberfläche werden Partikel aufgesprüht, wobei ein Teil der Partikel an der Vergussoberfläche verbleibt, wobei an der Vergussoberfläche eine Topographie erzeugt wird.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: German (DE)
Filing Language: German (DE)