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1. (WO2019025418) IMPROVED MASK FOR PROTECTING A SEMICONDUCTOR MATERIAL FOR LOCALIZED ETCHING APPLICATIONS
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Pub. No.: WO/2019/025418 International Application No.: PCT/EP2018/070687
Publication Date: 07.02.2019 International Filing Date: 31.07.2018
IPC:
H01L 21/308 (2006.01) ,H01L 21/467 (2006.01) ,H01L 21/02 (2006.01) ,H01L 21/306 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
308
using masks
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34
the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
46
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/36-H01L21/428142
461
to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
465
Chemical or electrical treatment, e.g. electrolytic etching
467
using masks
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
Applicants:
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE [FR/FR]; 3, rue Michel Ange 75016 PARIS, FR
Inventors:
ETCHEBERRY, Arnaud; FR
GONCALVES, Anne-Marie; FR
PELOUARD, Jean-Luc; FR
FREGNAUX, Mathieu; FR
LOUBAT, Anaïs; FR
Agent:
HABASQUE, Etienne; FR
NEYRET, Daniel; FR
BLOT, Philippe; FR
DOMENEGO, Bertrand; FR
COLOMBIE, Damien; FR
HOLTZ, Béatrice; FR
Priority Data:
175729431.07.2017FR
Title (EN) IMPROVED MASK FOR PROTECTING A SEMICONDUCTOR MATERIAL FOR LOCALIZED ETCHING APPLICATIONS
(FR) MASQUE PERFECTIONNÉ DE PROTECTION D'UN MATÉRIAU SEMICONDUCTEUR POUR DES APPLICATIONS DE GRAVURE LOCALISÉE
Abstract:
(EN) The invention relates to the chemical etching of a semiconductor material, including: - depositing at least one mask (PLP) on a first surface zone of a semiconductor material (SC); and - chemically etching (HBr) (S31) a second surface zone of the semiconductor material (SC) that is not covered by the mask (PLP). In particular, the aforementioned mask is produced in a material including polyphosphazene, which material protects the underlying semiconductor especially well.
(FR) L'invention concerne une gravure par attaque chimique d'un matériau semiconducteur, comportant : - un dépôt d'au moins un masque (PLP) sur une première zone de surface de matériau semiconducteur (SC), et - une gravure (S31) par attaque chimique (HBr) d'une deuxième zone de surface du matériau semiconducteur (SC) non recouverte par le masque (PLP). En particulier, le masque précité est réalisé dans un matériau comportant du polyphosphazène, matériau particulièrement protecteur du semiconducteur sous-jacent.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: French (FR)
Filing Language: French (FR)