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1. (WO2019024760) PIXEL CIRCUIT, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE.
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2019/024760 International Application No.: PCT/CN2018/097236
Publication Date: 07.02.2019 International Filing Date: 26.07.2018
IPC:
H01L 27/32 (2006.01) ,H01L 21/77 (2017.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
28
including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
32
with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
Applicants:
京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No. 10 Jiuxianqiao Rd., Chaoyang District Beijing 100015, CN
Inventors:
宋振 SONG, Zhen; CN
王国英 WANG, Guoying; CN
Agent:
北京市柳沈律师事务所 LIU, SHEN & ASSOCIATES; 中国北京市 海淀区彩和坊路10号1号楼10层 10th Floor, Building 1 10 Caihefang Road, Haidian District Beijing 100080, CN
Priority Data:
201710646875.201.08.2017CN
Title (EN) PIXEL CIRCUIT, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE.
(FR) CIRCUIT DE PIXELS, SON PROCÉDÉ DE FABRICATION ET DISPOSITIF D'AFFICHAGE
(ZH) 像素电路、其制造方法及显示装置
Abstract:
(EN) A pixel circuit (10), comprising a substrate (100), a first thin film transistor (11) provided thereon, and a second thin film transistor (12), wherein the first thin film transistor (11) has a top gate structure and the second thin film transistor (12) has a bottom gate structure. A first electrode (211) of the first thin film transistor (11) and a gate electrode (212) of the second thin film transistor (12) are electrically connected with each other and disposed on the same layer of the substrate (100). The pixel circuit (10) has high switching speed and a large driving current. A manufacturing method therefor is easily executed with minimal production costs.
(FR) L'invention concerne un circuit de pixels (10), comprenant un substrat (100), un premier transistor à couches minces (11) disposé sur celui-ci, et un second transistor à couches minces (12), le premier transistor à couches minces (11) ayant une structure de grille supérieure et le second transistor à couches minces (12) ayant une structure de grille inférieure. Une première électrode (211) du premier transistor à couches minces (11) et une électrode de grille (212) du second transistor à couches minces (12) sont électroconnectées l'une à l'autre et disposées sur la même couche du substrat (100). Le circuit de pixels (10) a une vitesse de commutation élevée et un courant d'attaque important. Un procédé de fabrication de celui-ci est facilement exécuté avec des coûts de production minimaux.
(ZH) 一种像素电路(10),包括基板(100)以及设置于所述基板上(100)的第一薄膜晶体管(11)、第二薄膜晶体管(12),其中,所述第一薄膜晶体管(11)为顶栅结构,所述第二薄膜晶体管(12)为底栅结构,所述第一薄膜晶体管(11)的第一极(211)和所述第二薄膜晶体管(12)的栅极(212)彼此电性连接,且同层设置于所述基板(100)上。该像素电路(10)具有较高的开关速度,同时具有较大的驱动电流,且制造方法易于实现,工艺成本较低。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)