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1. (WO2019024259) DISPLAY PANEL, ARRAY SUBSTRATE AND FORMING METHOD THEREFOR
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Pub. No.: WO/2019/024259 International Application No.: PCT/CN2017/107151
Publication Date: 07.02.2019 International Filing Date: 20.10.2017
IPC:
G02F 1/1362 (2006.01) ,G02F 1/1333 (2006.01) ,H01L 27/12 (2006.01)
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362
Active matrix addressed cells
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
1333
Constructional arrangements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
Applicants:
武汉华星光电技术有限公司 WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD [CN/CN]; 中国湖北省武汉市 东湖开发区高新大道666号生物城C5栋 Building C5 Biolake of Optics Valley, No.666 Gaoxin Avenue, East Lake High-tech Development Zone Wuhan, Hubei 430070, CN
Inventors:
陈辰 CHEN, Chen; CN
Agent:
深圳市威世博知识产权代理事务所(普通合伙) CHINA WISPRO INTELLECTUAL PROPERTY LLP.; 中国广东省深圳市 南山区高新区粤兴三道8号中国地质大学产学研基地中地大楼A806 Room A806 Zhongdi Building, China University of Geosciences Base, No. 8 Yuexing 3rd Road, High-Tech Industrial Estate, Nanshan District Shenzhen, Guangdong 518057, CN
Priority Data:
201710646087.331.07.2017CN
Title (EN) DISPLAY PANEL, ARRAY SUBSTRATE AND FORMING METHOD THEREFOR
(FR) PANNEAU D'AFFICHAGE, SUBSTRAT DE RÉSEAU ET PROCÉDÉ DE FORMATION ASSOCIÉ
(ZH) 显示面板、阵列基板及其形成方法
Abstract:
(EN) A display panel, an array substrate and a forming method therefor. The array substrate comprises a plurality of pixel regions, each of the pixel regions comprising a pixel electrode and at least one oxide thin film transistor; an input end of the pixel electrode is connected to an output end of the oxide thin film transistor, while a control end of the oxide thin film transistor is connected to a scan line, one end of the scan line being connected to a driving circuit; the oxide thin film transistor further comprises a gate insulating layer that is disposed on a gate of the oxide thin film transistor, the thickness of the gate insulating layer being inversely proportional to the length of the scan line, to which a corresponding gate is connected, from a connection point of the driving circuit to a gate connection point, and thereby the present invention may alleviate the problem of uniformity of the display panel and improve the quality of the display panel.
(FR) La présente invention concerne un panneau d'affichage, un substrat de réseau et un procédé de formation associé. Le substrat de réseau comprend une pluralité de régions de pixel, chacune des régions de pixel comprenant une électrode de pixel et au moins un transistor à couches minces d'oxyde ; une extrémité d'entrée de l'électrode de pixel est connectée à une extrémité de sortie du transistor à couches minces d'oxyde, tandis qu'une extrémité de commande du transistor à couches minces d'oxyde est connectée à une ligne de balayage, une extrémité de la ligne de balayage étant connectée à un circuit d'attaque ; le transistor à couches minces d'oxyde comprend en outre une couche d'isolation de grille qui est disposée sur une grille du transistor à couches minces d'oxyde, l'épaisseur de la couche d'isolation de grille étant inversement proportionnelle à la longueur de la ligne de balayage, à laquelle une grille correspondante est connectée, d'un point de connexion du circuit d'attaque à un point de connexion de grille, et ainsi la présente invention peut atténuer le problème d'uniformité du panneau d'affichage et améliorer la qualité du panneau d'affichage.
(ZH) 一种显示面板、阵列基板及其形成方法。阵列基板包括多个像素区域,每个像素区域包括像素电极以及至少一个氧化物薄膜晶体管,其中,像素电极的输入端与氧化物薄膜晶体管的输出端连接,氧化物薄膜晶体管的控制端与扫描线连接,扫描线的一端与驱动电路相连接,氧化物薄膜晶体管还包括设置在其栅极上的栅极绝缘层,其中,栅极绝缘层的厚度与对应栅极所连接的扫描线,从驱动电路的连接点到栅极连接点的长度成反比,从而能够改善显示面板的均一性问题,提高显示面板的质量。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)