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1. (WO2019009296) SWITCH ELEMENT, SWITCHING METHOD AND SEMICONDUCTOR DEVICE
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Pub. No.: WO/2019/009296 International Application No.: PCT/JP2018/025228
Publication Date: 10.01.2019 International Filing Date: 03.07.2018
IPC:
H01L 21/8239 (2006.01) ,H01L 27/105 (2006.01) ,H01L 29/06 (2006.01) ,H01L 29/66 (2006.01) ,H01L 45/00 (2006.01) ,H01L 49/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45
Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49
Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
Applicants:
日本電気株式会社 NEC CORPORATION [JP/JP]; 東京都港区芝五丁目7番1号 7-1, Shiba 5-chome, Minato-ku, Tokyo 1088001, JP
Inventors:
多田 宗弘 TADA Munehiro; JP
Agent:
下坂 直樹 SHIMOSAKA Naoki; JP
Priority Data:
2017-13308306.07.2017JP
Title (EN) SWITCH ELEMENT, SWITCHING METHOD AND SEMICONDUCTOR DEVICE
(FR) ÉLÉMENT DE COMMUTATION, PROCÉDÉ DE COMMUTATION ET DISPOSITIF À SEMI-CONDUCTEUR
(JA) スイッチ素子、スイッチ方法および半導体装置
Abstract:
(EN) [Problem] To stabilize the transition of a resistance variable element from a low resistance state to a high resistance state. [Solution] This switch element includes a resistance variable element, a first transistor, and a second transistor. The resistance variable element includes: a metal precipitation type resistance variable film; a first electrode which is connected to one surface of the resistance variable film and supplies metal ions to the resistance variable film; and a second electrode which is connected to the other surface of the resistance variable film. To the first electrode, a drain or a source of the first transistor is connected. To the second electrode, a source or a drain of the second transistor is connected. The switch element has a first mode and a second mode, when a potential of the second electrode is made higher than that of the first electrode and the resistance variable element is switched from the low resistance state to the high resistance state. The gate voltage is greater in the first mode than in the second mode, and a potential difference between the first and second electrodes is smaller in the first mode than in the second mode.
(FR) Le problème décrit par la présente invention est de stabiliser la transition d'un élément à résistance variable d'un état de faible résistance à un état de résistance élevée. La solution selon l'invention porte sur un élément de commutation doté d'un élément à résistance variable et de premier et second transistors. L'élément à résistance variable comprend : un film à résistance variable de type à précipitation des métaux ; une première électrode connectée à une surface du film à résistance variable et qui fournit des ions métalliques à ce dernier ; et une seconde électrode connectée à l'autre surface du film à résistance variable. Un drain ou une source du premier transistor est connecté à la première électrode. Une source ou un drain du second transistor est connecté à la seconde électrode. L'élément de commutation dispose d'un premier mode et d'un second mode, quand un potentiel de la seconde électrode devient supérieur au potentiel de la première électrode, et l'élément à résistance variable est commuté de l'état de faible résistance à l'état de résistance élevée. La tension de grille est supérieure dans le premier mode que dans le second mode, et une différence de potentiel entre les première et seconde électrodes est plus faible dans le premier mode que dans le second mode.
(JA) [課題]抵抗変化素子の低抵抗状態から高抵抗状態への遷移を安定化する。[解決手段]スイッチ素子は、抵抗変化素子と、第1のトランジスタと、第2のトランジスタとを有する。抵抗変化素子は、金属析出型の抵抗変化膜と、抵抗変化膜の一方の面に接続し抵抗変化膜に金属イオンを供給する第1の電極と、抵抗変化膜の他方の面に接続する第2の電極とを有する。第1の電極には、第1のトランジスタのドレインまたはソースが接続する。第2の電極には、第2のトランジスタのソースまたはドレインが接続する。スイッチ素子は、第2の電極の電位を第1の電極の電位よりも高くして、抵抗変化素子を低抵抗状態から高抵抗状態にスイッチする際に、第1のモードと第2のモードを有する。ゲート電圧は、第1のモードの方が第2のモードより大きく、第1と第2の電極間の電位差は、第1のモードの方が第2のモードよりも小さい。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)