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1. (WO2019008816) SUBSTRATE MODULE, AND METHOD FOR PRODUCING SUBSTRATE MODULE
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Pub. No.: WO/2019/008816 International Application No.: PCT/JP2018/006160
Publication Date: 10.01.2019 International Filing Date: 21.02.2018
IPC:
H01L 21/60 (2006.01) ,H01L 23/12 (2006.01) ,H05K 3/32 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
30
Assembling printed circuits with electric components, e.g. with resistor
32
electrically connecting electric components or wires to printed circuits
Applicants:
株式会社フジクラ FUJIKURA LTD. [JP/JP]; 東京都江東区木場一丁目5番1号 5-1, Kiba 1-chome, Koto-ku, Tokyo 1358512, JP
Inventors:
淡路 大輔 AWAJI, Daisuke; JP
Agent:
一色国際特許業務法人 ISSHIKI & CO.; 東京都港区三田三丁目11番36号 三田日東ダイビル Mita-Nitto Daibiru Bldg., 11-36, Mita 3-chome, Minato-ku, Tokyo 1080073, JP
Priority Data:
2017-13249706.07.2017JP
Title (EN) SUBSTRATE MODULE, AND METHOD FOR PRODUCING SUBSTRATE MODULE
(FR) MODULE DE SUBSTRAT, ET PROCÉDÉ DE PRODUCTION DE MODULE DE SUBSTRAT
(JA) 基板モジュール及び基板モジュールの製造方法
Abstract:
(EN) [Problem] To electrically connect two substrates using a conductive paste, while maintaining the interval between the two substrates at a prescribed distance. [Solution] This substrate module is provided with: a first substrate provided with a plurality of first pads; and a second substrate provided with a plurality of second pads. The first substrate and the second substrate are electrically connected. Spacers are attached to pads among the first pads and/or the second pads. The first pads and the second pads between which the spacers are not sandwiched are joined by a conductive paste, while the spacers are in a state of being sandwiched between the first pads and the second pads.
(FR) Le problème décrit par la présente invention est de connecter électriquement deux substrats au moyen d'une pâte conductrice tout en maintenant l'intervalle entre les deux substrats à une distance prescrite. La solution selon l'invention porte sur un module de substrat qui est doté : d'un premier substrat doté d'une pluralité de premiers plots ; et d'un second substrat doté d'une pluralité de seconds plots. Le premier substrat et le second substrat sont électriquement connectés. Des éléments d'espacement sont fixés à des plots parmi les premiers plots et/ou les seconds plots. Les premiers plots et les seconds plots entre lesquels les éléments d'espacement ne sont pas intercalés sont joints par une pâte conductrice, tandis que les éléments d'espacement sont dans un état intercalé entre les premiers plots et les seconds plots.
(JA) 【課題】2つの基板の間隔を所定の距離に維持しつつ、導電性ペーストを用いて2つの基板を電気的に接続すること。 【解決手段】本開示の基板モジュールは、複数の第1パッドを有する第1基板と、複数の第2パッドを有する第2基板と、を備え、前記第1基板と前記第2基板とが電気的に接続されている基板モジュールである。前記第1パッド及び前記第2パッドの少なくとも一方のパッドにスペーサが取り付けられており、前記スペーサが前記第1パッドと前記第2パッドとの間に挟まれた状態で、前記スペーサの挟まれていない前記第1パッドと前記第2パッドとが導電性ペーストによって接合されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)