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1. (WO2019005002) LEVEL SHIFTER
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Pub. No.: WO/2019/005002 International Application No.: PCT/US2017/039373
Publication Date: 03.01.2019 International Filing Date: 27.06.2017
IPC:
H01L 27/10 (2006.01) ,H01L 27/11502 (2017.01) ,H01L 49/02 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
[IPC code unknown for ERROR IPC Code incorrect: invalid subgroup (0=>999999)!]
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49
Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
02
Thin-film or thick-film devices
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054-1549, US
Inventors:
MANIPATRUNI, Sasikanth; US
LIU, Huichu; US
MORRIS, Daniel H.; US
AVCI, Uygar E.; US
VAIDYANATHAN, Kaushik; US
NIKONOV, Dmitri E.; US
KARNIK, Tanay; US
YOUNG, Ian A.; US
Agent:
CRANDALL, Sean C.; US
Priority Data:
Title (EN) LEVEL SHIFTER
(FR) DISPOSITIF DE DÉCALAGE DE NIVEAU
Abstract:
(EN) There is disclosed in one example a level shifter, including: a first ferroelectric capacitor; an input voltage signal applied to a first node of the first ferroelectric capacitor; a second capacitor; and an output voltage signal at a shared node of the first ferroelectric capacitor and second capacitor.
(FR) La présente invention concerne, dans un exemple, un dispositif de décalage de niveau qui comprend : un premier condensateur ferroélectrique ; un signal de tension d'entrée appliqué sur un premier nœud du premier condensateur ferroélectrique ; un second condensateur ; et un signal de tension de sortie à un nœud partagé du premier condensateur ferroélectrique et du second condensateur.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)