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1. (WO2019004276) WAFER BONDED BACK ILLUMINATED IMAGER
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Pub. No.: WO/2019/004276 International Application No.: PCT/JP2018/024341
Publication Date: 03.01.2019 International Filing Date: 27.06.2018
IPC:
H01L 27/146 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14
including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144
Devices controlled by radiation
146
Imager structures
Applicants:
SONY SEMICONDUCTOR SOLUTIONS CORPORATION [JP/JP]; 4-14-1 Asahi-cho, Atsugi-shi, Kanagawa 2430014, JP
Inventors:
YAMAGISHI, Hajime; JP
Agent:
MARUSHIMA, Toshikazu; JP
Priority Data:
2017-12750429.06.2017JP
Title (EN) WAFER BONDED BACK ILLUMINATED IMAGER
(FR) IMAGEUR RÉTROÉCLAIRÉ LIÉ À UNE TRANCHE
Abstract:
(EN) An imaging device includes a first substrate including a pixel array and a first multilayer wiring layer. The first multilayer wiring layer includes a first wiring that receives electrical signals based on electric charge generated by at least one photoelectric conversion unit, and a plurality of second wirings. The imaging device includes a second substrate including a second multilayer wiring layer and a logic circuit that processes the electrical signals. The second multilayer wiring layer includes a third wiring bonded to the first wiring, and a plurality of fourth wirings. At least one of the plurality of fourth wirings being bonded to at least one of the plurality of second wirings. The second multilayer wiring layer includes at least one fifth wiring that is connected to the plurality of fourth wirings and that receives a power supply signal.
(FR) La présente invention concerne un imageur comprenant un premier substrat comportant un réseau de pixels et une première couche de câblage multicouche. La première couche de câblage multicouche comprend un premier câblage qui reçoit des signaux électriques basés sur une charge électrique générée par au moins une unité de conversion photoélectrique, et une pluralité de deuxièmes câblages. L'imageur comprend un second substrat comprenant une seconde couche de câblage multicouche et un circuit logique qui traite les signaux électriques. La seconde couche de câblage multicouche comprend un troisième câblage lié au premier câblage, et une pluralité de quatrièmes câblages. Au moins un câblage des quatrièmes câblages est lié à au moins un câblage des deuxièmes câblages. La seconde couche de câblage multicouche comprend au moins un cinquième câblage qui est connecté à la pluralité de quatrièmes câblages et qui reçoit un signal d'alimentation électrique.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)