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1. (WO2019003599) DEVICE ANALYSIS APPARATUS AND DEVICE ANALYSIS METHOD
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Pub. No.: WO/2019/003599 International Application No.: PCT/JP2018/016039
Publication Date: 03.01.2019 International Filing Date: 18.04.2018
IPC:
G01R 31/26 (2014.01) ,G01R 31/00 (2006.01) ,H01L 21/66 (2006.01)
G PHYSICS
01
MEASURING; TESTING
R
MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
26
Testing of individual semiconductor devices
G PHYSICS
01
MEASURING; TESTING
R
MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
66
Testing or measuring during manufacture or treatment
Applicants:
浜松ホトニクス株式会社 HAMAMATSU PHOTONICS K.K. [JP/JP]; 静岡県浜松市東区市野町1126番地の1 1126-1, Ichino-cho, Higashi-ku, Hamamatsu-shi, Shizuoka 4358558, JP
Inventors:
松本 徹 MATSUMOTO Toru; JP
遠藤 幸一 ENDO Koichi; JP
中村 共則 NAKAMURA Tomonori; JP
越川 一成 KOSHIKAWA Kazushige; JP
Agent:
長谷川 芳樹 HASEGAWA Yoshiki; JP
黒木 義樹 KUROKI Yoshiki; JP
柴山 健一 SHIBAYAMA Kenichi; JP
Priority Data:
2017-12730429.06.2017JP
Title (EN) DEVICE ANALYSIS APPARATUS AND DEVICE ANALYSIS METHOD
(FR) APPAREIL D'ANALYSE DE DISPOSITIF ET PROCÉDÉ D'ANALYSE DE DISPOSITIF
(JA) デバイス解析装置及びデバイス解析方法
Abstract:
(EN) A device analysis apparatus 1 executes determination of the quality of a power semiconductor device P, and is provided with: an application unit 12 that applies a voltage signal to the power semiconductor device P; a photodetection unit 13 that detects light from the power semiconductor device P at a plurality of detection positions A-D, and outputs a detection signal based on the detection result; and a determination unit 33 that determines the quality of the power semiconductor device P on the basis of the temporal change of the detection signal.
(FR) L'invention concerne un appareil d'analyse de dispositif (1) qui exécute une détermination de la qualité d'un dispositif semi-conducteur de puissance (P), et qui comprend : une unité d'application (12) qui applique un signal de tension au dispositif semi-conducteur de puissance (P) ; une unité de photodétection (13) qui détecte la lumière provenant du dispositif semi-conducteur de puissance (P) en une pluralité de positions de détection (A à D), et qui délivre un signal de détection en fonction du résultat de détection ; et une unité de détermination (33) qui détermine la qualité du dispositif semi-conducteur de puissance (P) en fonction du changement temporel du signal de détection.
(JA) デバイス解析装置1は、パワー半導体デバイスPの良否判別を実行するデバイス解析装置であって、パワー半導体デバイスPに電圧信号を印加する印加部12と、パワー半導体デバイスPからの光を複数の検出位置A~Dで検出し、検出結果に基づく検出信号を出力する光検出部13と、検出信号の時間変化に基づいてパワー半導体デバイスPの良否を判別する判別部33と、を備える。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)