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1. (WO2019003305) ORGANIC EL DEVICE PRODUCTION METHOD
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Pub. No.: WO/2019/003305 International Application No.: PCT/JP2017/023589
Publication Date: 03.01.2019 International Filing Date: 27.06.2017
IPC:
H05B 33/10 (2006.01) ,G09F 9/00 (2006.01) ,G09F 9/30 (2006.01) ,H01L 21/336 (2006.01) ,H01L 27/32 (2006.01) ,H01L 29/786 (2006.01) ,H01L 51/50 (2006.01) ,H05B 33/02 (2006.01) ,H05B 33/04 (2006.01) ,H05B 33/12 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
10
Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
F
DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9
Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
F
DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9
Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30
in which the desired character or characters are formed by combining individual elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
28
including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
32
with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
50
specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
02
Details
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
02
Details
04
Sealing arrangements
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
12
Light sources with substantially two-dimensional radiating surfaces
Applicants:
堺ディスプレイプロダクト株式会社 SAKAI DISPLAY PRODUCTS CORPORATION [JP/JP]; 大阪府堺市堺区匠町1番地 1, Takumicho, Sakai-ku, Sakai-shi, Osaka 5908522, JP
Inventors:
鳴瀧 陽三 NARUTAKI, Yozo; --
岸本 克彦 KISHIMOTO, Katsuhiko; --
Agent:
奥田 誠司 OKUDA Seiji; JP
Priority Data:
Title (EN) ORGANIC EL DEVICE PRODUCTION METHOD
(FR) PROCÉDÉ DE PRODUCTION DE DISPOSITIF EL ORGANIQUE
(JA) 有機ELデバイスの製造方法
Abstract:
(EN) This organic EL device (100) production method involves a step of forming a drive circuit layer (2) over a substrate (1), a step of forming an inorganic protective layer (Pa) over the drive circuit layer, a step of forming an organic flattened layer (Pb) over the inorganic protective layer, a step of heating the organic flattened layer to a temperature of 200°C or higher, and a step of forming, after the heating step, an organic EL element layer (3) over the organic flattened layer. This method further involves, after forming the organic flattened layer and prior to the step of heating the organic flattened layer, a step of forming an organic polymer film covering the organic flattened layer, and a step of removing the organic polymer film.
(FR) La présente invention concerne un procédé de production de dispositif EL organique (100) qui comprend une étape de formation d'une couche de circuit d'attaque (2) sur un substrat (1), une étape de formation d'une couche de protection inorganique (Pa) sur la couche de circuit d'attaque, une étape de formation d'une couche aplatie organique (Pb) sur la couche protectrice inorganique, une étape de chauffage de la couche aplatie organique à une température supérieure ou égale à 200 °C, et une étape de formation, après l'étape de chauffage, d'une couche d'élément EL organique (3) sur la couche aplatie organique. Ce procédé comprend en outre, après la formation de la couche aplatie organique et avant l'étape de chauffage de la couche aplatie organique, une étape de formation d'un film polymère organique recouvrant la couche aplatie organique, et une étape d'élimination du film polymère organique.
(JA) 有機ELデバイス(100)の製造方法は、基板(1)上に駆動回路層(2)を形成する工程と、駆動回路層上に無機保護層(Pa)を形成する工程と、無機保護層上に有機平坦化層(Pb)を形成する工程と、有機平坦化層を200℃以上の温度に加熱する工程と、加熱工程の後に、有機平坦化層上に、有機EL素子層(3)を形成する工程とを包含し、有機平坦化層を形成した後、かつ有機平坦化層を加熱する工程の前に、有機平坦化層を覆う有機高分子膜を形成する工程と、有機高分子膜を除去する工程とをさらに包含する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)