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1. (WO2019003037) SEMICONDUCTOR DEVICE AND ELECTRONIC COMPONENT
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Pub. No.: WO/2019/003037 International Application No.: PCT/IB2018/054405
Publication Date: 03.01.2019 International Filing Date: 15.06.2018
IPC:
H04N 5/369 (2011.01) ,G11C 11/405 (2006.01) ,H01L 27/1156 (2017.01) ,H01L 27/146 (2006.01) ,H01L 29/786 (2006.01) ,H04N 5/374 (2011.01)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
N
PICTORIAL COMMUNICATION, e.g. TELEVISION
5
Details of television systems
30
Transforming light or analogous information into electric information
335
using solid-state image sensors [SSIS]
369
SSIS architecture; Circuitry associated therewith
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
401
forming cells needing refreshing or charge regeneration, i.e. dynamic cells
403
with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
405
with three charge-transfer gates, e.g. MOS transistors, per cell
[IPC code unknown for H01L 27/1156]
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14
including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144
Devices controlled by radiation
146
Imager structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
N
PICTORIAL COMMUNICATION, e.g. TELEVISION
5
Details of television systems
30
Transforming light or analogous information into electric information
335
using solid-state image sensors [SSIS]
369
SSIS architecture; Circuitry associated therewith
374
Addressed sensors, e.g. MOS or CMOS sensors
Applicants:
株式会社半導体エネルギー研究所 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP/JP]; 神奈川県厚木市長谷398 398, Hase, Atsugi-shi, Kanagawa 2430036, JP
Inventors:
岡本佑樹 OKAMOTO, Yuki; JP
黒川義元 KUROKAWA, Yoshiyuki; JP
楠本直人 KUSUMOTO, Naoto; JP
Priority Data:
2017-12512427.06.2017JP
Title (EN) SEMICONDUCTOR DEVICE AND ELECTRONIC COMPONENT
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET COMPOSANT ÉLECTRONIQUE
(JA) 半導体装置および電子部品
Abstract:
(EN) Provided is a semiconductor device which is capable of holding a signal detected by a sensor element. This semiconductor device is provided with a sensor element, a first transistor, a second transistor, and a third transistor, wherein one electrode of the sensor element is electrically connected to a first gate, the first gate is electrically connected to either the source or the drain of the third transistor, either the source or the drain of the first transistor is electrically connected to the gate of the second transistor, and a semiconductor layer is provided with a metal oxide.
(FR) L'invention concerne un dispositif à semi-conducteur qui est capable de maintenir un signal détecté par un élément de capteur. Le dispositif à semi-conducteur de la présente invention est pourvu d'un élément de capteur, d'un premier transistor, d'un deuxième transistor et d'un troisième transistor, une électrode de l'élément de capteur étant électriquement connectée à une première grille, la première grille étant électriquement connectée soit à la source soit au drain du troisième transistor, soit la source soit le drain du premier transistor étant connecté électriquement à la grille du deuxième transistor, et une couche semi-conductrice étant pourvue d'un oxyde métallique.
(JA) センサ素子が検知した信号を保持することのできる半導体装置を提供する。 センサ素子と、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、を有し、セ ンサ素子の一方の電極は第1のゲートと電気的に接続され、第1のゲートは第3のトランジスタのソ ースまたはドレインの一方と電気的に接続され、第1のトランジスタのソースまたはドレインの一方 は第2のトランジスタのゲートと電気的に接続され、半導体層は金属酸化物を有する構成とする。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)