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1. (WO2019002097) SEMICONDUCTOR CHIP WITH TRANSPARENT CURRENT SPREADING LAYER
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Pub. No.: WO/2019/002097 International Application No.: PCT/EP2018/066644
Publication Date: 03.01.2019 International Filing Date: 21.06.2018
IPC:
H01L 33/14 (2010.01) ,H01L 33/38 (2010.01) ,H01L 33/22 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
14
with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
36
characterised by the electrodes
38
with a particular shape
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
20
with a particular shape, e.g. curved or truncated substrate
22
Roughened surfaces, e.g. at the interface between epitaxial layers
Applicants:
OSRAM OPTO SEMICONDUCTORS GMBH [DE/DE]; Leibnizstr. 4 93055 Regensburg, DE
Inventors:
VARGHESE, Tansen; DE
Agent:
EPPING HERMANN FISCHER PATENTANWALTSGESELLSCHAFT MBH; Schloßschmidstr. 5 80639 München, DE
Priority Data:
10 2017 114 467.629.06.2017DE
Title (EN) SEMICONDUCTOR CHIP WITH TRANSPARENT CURRENT SPREADING LAYER
(FR) PUCE SEMI-CONDUCTRICE POURVUE D'UNE COUCHE D'ÉTALEMENT DU COURANT TRANSPARENTE
(DE) HALBLEITERCHIP MIT TRANSPARENTER STROMAUFWEITUNGSSCHICHT
Abstract:
(EN) The invention relates to a semiconductor chip (10) with a radiation-permeable support (1), a semiconductor body (2) and a transparent current spreading layer (3), wherein the semiconductor body has an n-sided semiconductor layer, a p-sided semiconductor layer (22) and an optically active area (23) therebetween. The semiconductor body is secured to the support by means of a radiation permeable connection layer (5). The current spreading layer is based on zinc selenide and is adjacent to the n-sided semiconductor layer. The invention also relates to a method for producing said type of semiconductor chip.
(FR) L'invention concerne une puce semi-conductrice (10) comprenant un support (1) perméable au rayonnement, un corps semi-conducteur (2) et une couche d'étalement du courant (3) transparente, le corps semi-conducteur présentant une couche semi-conductrice côté n (21), une couche semi-conductrice côté p (22) et une zone optiquement active (23) située entre ces deux couches. Le corps semi-conducteur est fixé au support au moyen d'une couche de liaison (5) perméable au rayonnement. La couche d'étalement du courant est à base de séléniure de zinc et est adjacente à la couche semi-conductrice côté n. L'invention concerne en outre un procédé de fabrication d'une puce semi-conductrice de ce type.
(DE) Es wird ein Halbleiterchip (10) mit einem strahlungsdurchlässigen Träger (1), einem Halbleiterkörper (2) und einer transparenten Stromaufweitungsschicht (3) angegeben, wobei der Halbleiterkörper eine n-seitige Halbleiterschicht (21), eine p-seitige Halbleiterschicht (22) und eine dazwischenliegende optisch aktive Zone (23) aufweist. Der Halbleiterkörper ist mittels einer strahlungsdurchlässigen Verbindungsschicht (5) mit dem Träger befestigt. Die Stromaufweitungsschicht basiert auf Zinkselenid und grenzt an die n-seitige Halbleiterschicht an. Des Weiteren wird ein Verfahren zur Herstellung eines solchen Halbleiterchips angegeben.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: German (DE)
Filing Language: German (DE)