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1. (WO2019001570) FLASH MEMORY AND PREPARATION METHOD THEREFOR
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Pub. No.: WO/2019/001570 International Application No.: PCT/CN2018/093701
Publication Date: 03.01.2019 International Filing Date: 29.06.2018
IPC:
H01L 21/8246 (2006.01) ,H01L 27/115 (2017.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8246
Read-only memory structures (ROM)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
112
Read-only memory structures
115
Electrically programmable read-only memories
Applicants:
无锡华润上华科技有限公司 CSMC TECHNOLOGIES FAB2 CO., LTD. [CN/CN]; 中国江苏省无锡市 新区新洲路8号 No.8 Xinzhou Road Wuxi New District, Jiangsu 214028, CN
Inventors:
梁志彬 LIANG, Zhibin; CN
刘涛 LIU, Tao; CN
张松 ZHANG, Song; CN
金炎 JIN, Yan; CN
王德进 WANG, Dejin; CN
王成 WANG, Cheng; CN
Agent:
广州华进联合专利商标代理有限公司 ADVANCE CHINA IP LAW OFFICE; 中国广东省广州市 天河区花城大道85号3901房 Room 3901, No.85 Huacheng Avenue, Tianhe District Guangzhou, Guangdong 510623, CN
Priority Data:
201710525672.830.06.2017CN
Title (EN) FLASH MEMORY AND PREPARATION METHOD THEREFOR
(FR) MÉMOIRE FLASH ET SON PROCÉDÉ DE PRÉPARATION
(ZH) 闪存存储器及其制备方法
Abstract:
(EN) A flash memory and a preparation method therefor. The preparation method comprises: sequentially forming a floating gate oxide layer, a floating gate polycrystalline layer and a barrier layer on a semiconductor substrate; sequentially etching the barrier layer and the floating gate polycrystalline layer to form a window, the window extending into the floating gate polycrystalline layer; pre-treating the floating gate polycrystalline layer exposed at a window region, so that the floating gate polycrystalline layer recesses in the direction of the floating gate oxide layer and the depth of the recess decreases from the middle position to the edges of the two sides of the window region; forming a first field oxide layer and filling a window in the floating gate polycrystalline layer; and carrying out etching to form a floating gate having a discharging sharp angle.
(FR) L'invention concerne une mémoire flash et son procédé de préparation consistant : à former séquentiellement une couche d'oxyde de grille flottante, une couche polycristalline de grille flottante et une couche d'arrêt sur un substrat semi-conducteur ; à graver séquentiellement la couche d'arrêt et la couche polycristalline de grille flottante de manière à former une fenêtre, la fenêtre s'étendant dans la couche polycristalline de grille flottante ; à prétraiter la couche polycristalline de grille flottante mise à nu au niveau d'une région de fenêtre, de sorte que la couche polycristalline de grille flottante soit évidée dans la direction de la couche d'oxyde de grille flottante et que la profondeur de l'évidement diminue depuis la position médiane vers les bords des deux côtés de la région de fenêtre ; à former une première couche d'oxyde de champ et à remplir une fenêtre dans la couche polycristalline de grille flottante ; et à réaliser une gravure de manière à former une grille flottante présentant un angle aigu de décharge.
(ZH) 一种闪存存储器及其制备方法。制备方法包括:在半导体衬底上依次形成浮栅氧化层、浮栅多晶层和阻挡层;依次刻蚀阻挡层、浮栅多晶层形成窗口,窗口延伸至浮栅多晶层内;对暴露在窗口区域的浮栅多晶层进行预处理,使浮栅多晶层向沿浮栅氧化层的方向凹陷,且凹陷的深度由所述窗口区域的中心位置向两侧边缘呈递减趋势;形成第一场氧化层,并填满位于浮栅多晶层内的窗口;刻蚀形成带有放电尖角的浮栅。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)