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1. (WO2018225306) SOLID-STATE IMAGING ELEMENT AND IMAGING APPARATUS
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Pub. No.: WO/2018/225306 International Application No.: PCT/JP2018/006609
Publication Date: 13.12.2018 International Filing Date: 23.02.2018
IPC:
H04N 5/3745 (2011.01) ,H01L 27/146 (2006.01)
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
N
PICTORIAL COMMUNICATION, e.g. TELEVISION
5
Details of television systems
30
Transforming light or analogous information into electric information
335
using solid-state image sensors [SSIS]
369
SSIS architecture; Circuitry associated therewith
374
Addressed sensors, e.g. MOS or CMOS sensors
3745
having additional components embedded within a pixel or connected to a group of pixels within a sensor matrix, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14
including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144
Devices controlled by radiation
146
Imager structures
Applicants:
ソニーセミコンダクタソリューションズ株式会社 SONY SEMICONDUCTOR SOLUTIONS CORPORATION [JP/JP]; 神奈川県厚木市旭町四丁目14番1号 4-14-1 Asahi-cho, Atsugi-shi, Kanagawa 2430014, JP
Inventors:
中舘 和彦 NAKADATE, Kazuhiko; JP
若野 壽史 WAKANO, Toshifumi; JP
中溝 正彦 NAKAMIZO, Masahiko; JP
Agent:
丸島 敏一 MARUSHIMA, Toshikazu; JP
Priority Data:
2017-11052205.06.2017JP
Title (EN) SOLID-STATE IMAGING ELEMENT AND IMAGING APPARATUS
(FR) ÉLÉMENT D'IMAGERIE À SEMI-CONDUCTEURS ET APPAREIL D'IMAGERIE
(JA) 固体撮像素子および撮像装置
Abstract:
(EN) A solid-state imaging element of pixel shared type, wherein the drive capability of a transistor is improved. A first charge accumulation unit and a second charge accumulation unit are arranged in a prescribed direction. A first transfer unit causes electric charges to be transferred from a plurality of first photoelectric conversion elements to the first charge accumulation unit and accumulated therein. A second transfer unit causes electric charges to be transferred from a plurality of second photoelectric conversion elements to the second charge accumulation unit and accumulated therein. A first transistor outputs a signal that corresponds to the amount of electric charges accumulated in each of the first charge accumulation unit and the second charge accumulation unit. A second transistor is arranged in a prescribed direction together with the first transistor and connected to the first transistor in parallel.
(FR) L'invention concerne un élément d'imagerie à semi-conducteurs de type à pixels partagés, qui permet d'améliorer la capacité de pilotage d'un transistor. Une première unité d'accumulation de charges et une seconde unité d'accumulation de charges sont placées dans une direction prescrite. Une première unité de transfert amène des charges électriques à être transférées d'une pluralité de premiers éléments de conversion photoélectrique à la première unité d'accumulation de charges et à y être accumulées. Une seconde unité de transfert amène des charges électriques à être transférées d'une pluralité de seconds éléments de conversion photoélectrique à la seconde unité d'accumulation de charges et à y être accumulées. Un premier transistor délivre un signal qui correspond à la quantité de charges électriques accumulées à la fois dans la première unité d'accumulation de charges et la seconde unité d'accumulation de charges. Un second transistor est placé dans une direction prescrite conjointement avec le premier transistor et est connecté au premier transistor en parallèle.
(JA) 画素共有型の固体撮像素子において、トランジスタの駆動力を向上させる。 第1電荷蓄積部および第2電荷蓄積部は、所定方向に配列される。第1転送部は、複数の第1光電変換素子から第1電荷蓄積部へ電荷を転送して蓄積させる。第2転送部は、複数の第2光電変換素子から第2電荷蓄積部へ電荷を転送して蓄積させる。第1トランジスタは、第1電荷蓄積部および第2電荷蓄積部のそれぞれに蓄積された電荷の量に応じた信号を出力する。第2トランジスタは、所定方向に第1トランジスタとともに配列されて第1トランジスタに並列に接続される。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)