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1. (WO2018223879) MANUFACTURING METHOD OF ELECTRODE PATTERN, THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
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Pub. No.: WO/2018/223879 International Application No.: PCT/CN2018/089111
Publication Date: 13.12.2018 International Filing Date: 31.05.2018
IPC:
H01L 21/3213 (2006.01) ,H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
321
After-treatment
3213
Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No. 10 Jiuxianqiao Rd., Chaoyang District Beijing 100015, CN
Inventors:
李海旭 LI, Haixu; CN
曹占锋 CAO, Zhanfeng; CN
姚琪 YAO, Qi; CN
汪建国 WANG, Jianguo; CN
孟凡娜 MENG, Fanna; CN
Agent:
北京市柳沈律师事务所 LIU, SHEN & ASSOCIATES; 中国北京市 海淀区彩和坊路10号1号楼10层 10th Floor, Building 1, 10 Caihefang Road, Haidian District Beijing 100080, CN
Priority Data:
201710416020.005.06.2017CN
Title (EN) MANUFACTURING METHOD OF ELECTRODE PATTERN, THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
(FR) PROCÉDÉ DE FABRICATION D'UN MOTIF D'ÉLECTRODE, TRANSISTOR À COUCHES MINCES ET SON PROCÉDÉ DE FABRICATION ET PANNEAU D'AFFICHAGE
(ZH) 电极图案的制备方法、薄膜晶体管及其制备方法、显示面板
Abstract:
(EN) Provided in an embodiment of the present invention are a manufacturing method of an electrode pattern, a thin film transistor and a manufacturing method thereof, and a display panel. The manufacturing method of an electrode pattern comprises: forming a metal thin film; performing processing on the metal thin film to form a partner layer over a surface of the metal thin film, the partner layer being configured to react with a photoresist to form a hydrogen bond; and performing patterning to form an electrode. When patterning is performed on a metal thin film over which a partner layer is formed, a hydrogen bond formed as a result of reaction between the partner layer and a photoresist effectively enhances adhesive strength between the photoresist and a metal, such that the photoresist does not separate easily in a process of etching the metal, thereby realizing widespread use of thin film transistors.
(FR) Selon un mode de réalisation, la présente invention concerne un procédé de fabrication d'un motif d'électrode, un transistor à couches minces et son procédé de fabrication, et un panneau d'affichage. Le procédé de fabrication d'un motif d'électrode comprend : la formation d'un film mince métallique; la réalisation d'un traitement sur le film mince métallique pour former une couche partenaire sur une surface du film mince métallique, la couche partenaire étant configurée pour réagir avec une résine photosensible pour former une liaison hydrogène; et la réalisation d'une formation de motif pour former une électrode. Lors de la formation d'un motif sur un film mince métallique sur lequel une couche partenaire est formée, une liaison hydrogène formée en résultat de la réaction entre la couche partenaire et une résine photosensible améliore efficacement la force d'adhérence entre la résine photosensible et un métal, de telle sorte que la résine photosensible ne se sépare pas facilement dans un procédé de gravure du métal, ce qui permet d'obtenir une utilisation généralisée des transistors à couches minces.
(ZH) 本公开的实施例提供了一种电极图案的制备方法、薄膜晶体管及其制备方法、显示面板,其中,该电极图案的制备方法包括:形成金属薄膜;对金属薄膜进行处理,使金属薄膜的表面上形成配合层;所述配合层配置为与光刻胶作用产生氢键;通过构图工艺形成电极,当在表面上形成有配合层的金属薄膜上进行构图工艺时,由于配合层与光刻胶作用产生氢键,有效的提高了光刻胶与金属之间的粘附力,使得金属刻蚀过程中光刻胶不易脱落,实现了薄膜晶体管的广泛使用。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)