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1. (WO2018222332) Self-Aligned Nanowire-Based Light Emitting Diode Subpixels for a Direct View Display and Method of Making Thereof
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Pub. No.: WO/2018/222332 International Application No.: PCT/US2018/030692
Publication Date: 06.12.2018 International Filing Date: 02.05.2018
IPC:
H01L 33/00 (2010.01) ,H01L 33/04 (2010.01) ,H01L 33/22 (2010.01) ,H01L 33/60 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
04
with a quantum effect structure or superlattice, e.g. tunnel junction
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
02
characterised by the semiconductor bodies
20
with a particular shape, e.g. curved or truncated substrate
22
Roughened surfaces, e.g. at the interface between epitaxial layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
58
Optical field-shaping elements
60
Reflective elements
Applicants:
SCHNEIDER JR, Richard P. [US/US]; US
GLO AB [SE/SE]; Scheelevägen 22 223 63 Lund, SE
Inventors:
SCHNEIDER JR, Richard P.; US
LEUNG, Benjamin; US
Agent:
RADOMSKY, Leon; US
COHN, Joanna; US
CONNOR, David; US
GAYOSO, Tony; US
GEMMEL, Elizabeth; US
GILL, Matthew; US
GREGORY, Shaun D.; US
GUNNELS, Zarema; US
HANSEN, Robert; US
HUANG, Stephen; US
HYAMS, David; US
JOHNSON, Timothy; US
MAZAHERY, Benjamin; US
MURPHY, Timothy; US
NGUYEN, Jaqueline; US
O'BRIEN, Michelle; US
PARK, Byeongju; US
RUTT, Steven; US
SIMON, Phyllis; US
SULSKY, Martin; US
Priority Data:
15/610,96801.06.2017US
Title (EN) Self-Aligned Nanowire-Based Light Emitting Diode Subpixels for a Direct View Display and Method of Making Thereof
(FR) SOUS-PIXELS À DIODES ÉLECTROLUMINESCENTES À BASE DE NANOFILS AUTO-ALIGNÉS POUR AFFICHAGE À VUE DIRECTE ET PROCÉDÉ DE FABRICATION ASSOCIÉ
Abstract:
(EN) A light emitting device, such as an LED, is formed by forming clusters of semiconductor nanostructures separated by inter-cluster regions that lack semiconductor nanostructures over a substrate, where each semiconductor nanostructure includes a nanostructure core having a doping of a first conductivity type and an active shell formed around the nanostructure core, and selectively depositing a second conductivity type semiconductor material layer having a doping of a second conductivity type on the clusters of semiconductor nanostructures. Portions of the selectively deposited second conductivity type semiconductor material layer form a continuous material layer in each cluster of semiconductor nanostructures, and the second conductivity type semiconductor material layer is not deposited in the inter-cluster regions.
(FR) L'invention concerne un dispositif électroluminescent, tel qu'une DEL, formée par formation de clusters de nanostructures semi-conductrices séparées par des régions inter-clusters qui manquent de nanostructures semi-conductrices sur un substrat, chaque nanostructure semi-conductrice comprenant un cœur de nanostructure ayant un dopage d'un premier type de conductivité et une enveloppe active formée autour du coeur de nanostructure, et le dépôt sélectif d'une couche de matériau semi-conducteur de second type de conductivité ayant un dopage d'un second type de conductivité sur les clusters de nanostructures semi-conductrices. Des parties de la couche de matériau semi-conducteur de second type de conductivité déposée de manière sélective forment une couche de matériau continu dans chaque groupe de nanostructures semi-conductrices, et la couche de matériau semi-conducteur de second type de conductivité n'est pas déposée dans les régions inter-clusters.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)