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1. (WO2018220932) SEMICONDUCTOR MODULE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE
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Pub. No.: WO/2018/220932 International Application No.: PCT/JP2018/008909
Publication Date: 06.12.2018 International Filing Date: 08.03.2018
IPC:
H01L 33/62 (2010.01) ,F21S 2/00 (2016.01) ,F21V 19/00 (2006.01) ,H01L 33/52 (2010.01) ,F21Y 115/10 (2016.01) ,H01L 23/28 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
62
Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
F MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
21
LIGHTING
S
NON-PORTABLE LIGHTING DEVICES OR SYSTEMS THEREOF
2
Systems of lighting devices, not provided for in main groups F21S4/-F21S10/119
F MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
21
LIGHTING
V
FUNCTIONAL FEATURES OR DETAILS OF LIGHTING DEVICES OR SYSTEMS THEREOF; STRUCTURAL COMBINATIONS OF LIGHTING DEVICES WITH OTHER ARTICLES, NOT OTHERWISE PROVIDED FOR
19
Fastening of light sources or lamp holders
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
52
Encapsulations
[IPC code unknown for F21Y 115/10]
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
Applicants:
シャープ株式会社 SHARP KABUSHIKI KAISHA [JP/JP]; 大阪府堺市堺区匠町1番地 1, Takumi-cho, Sakai-ku, Sakai City, Osaka 5908522, JP
Inventors:
東坂 浩由 HIGASHISAKA, Hiroyoshi; --
Agent:
特許業務法人HARAKENZO WORLD PATENT & TRADEMARK HARAKENZO WORLD PATENT & TRADEMARK; 大阪府大阪市北区天神橋2丁目北2番6号 大和南森町ビル Daiwa Minamimorimachi Building, 2-6, Tenjinbashi 2-chome Kita, Kita-ku, Osaka-shi, Osaka 5300041, JP
Priority Data:
2017-10698130.05.2017JP
Title (EN) SEMICONDUCTOR MODULE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE
(FR) DISPOSITIF À SEMICONDUCTEURS, DISPOSITIF D'AFFICHAGE ET PROCÉDÉ DE FABRICATION D'UN DISPOSITIF À SEMICONDUCTEURS
(JA) 半導体モジュール、表示装置、および半導体モジュールの製造方法。
Abstract:
(EN) Resin (16) covers the side surface and the back surface of a blue LED (15) and holds the blue LED (15) horizontal. An electrode (14) is provided between the front surface of a wiring substrate (11) and the back surface of the blue LED (15), passes through the resin (16), and electrically connects the wiring substrate (11) and the blue LED (15). The light-emitting surface (front surface) (151) of the blue LED (15) is exposed through the resin (16), and the light-emitting surface (front surface) (151) and the back surface (161) of the resin (16) are disposed in the same plane.
(FR) La présente invention concerne une résine (16) qui recouvre la surface latérale et la surface arrière d'une DEL bleue (15) et maintient la DEL bleue (15) horizontale. Une électrode (14) est située entre la surface avant d'un substrat de câblage (11) et la surface arrière de la DEL bleue (15), passe à travers la résine (16) et connecte électriquement le substrat de câblage (11) et la DEL bleue (15). La surface électroluminescente (surface avant) (151) de la DEL bleue (15) est apparente à travers la résine (16) et la surface électroluminescente (surface avant) (151) et la surface arrière (161) de la résine (16) sont disposées dans le même plan.
(JA) 樹脂(16)は、青色LED(15)の側面および裏面を被覆し、かつ青色LED(15)を水平に保持する。電極(14)は、配線基板(11)の表面と青色LED(15)の裏面との間に設けられ、樹脂(16)を貫通し、かつ配線基板(11)と青色LED(15)とを電気的に接続する。青色LED(15)の光出射面(表面)(151)が樹脂(16)から露出してなり、光出射面(表面)(151)と樹脂(16)の表面(161)とを同一の平面に配置してなる。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)