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1. (WO2018220668) POWER AMPLIFIER
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Pub. No.: WO/2018/220668 International Application No.: PCT/JP2017/019892
Publication Date: 06.12.2018 International Filing Date: 29.05.2017
H03F 1/32 (2006.01) ,H03F 3/21 (2006.01)
Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
Modifications of amplifiers to reduce non-linear distortion
Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
with semiconductor devices only
三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP
鳥居 拓真 TORII, Takuma; JP
半谷 政毅 HANGAI, Masatake; JP
山中 宏治 YAMANAKA, Koji; JP
石田 多華生 ISHIDA, Takao; JP
江口 慎一 EGUCHI, Shinichi; JP
畑本 幹夫 HATAMOTO, Mikio; JP
田澤 英昭 TAZAWA, Hideaki; JP
濱田 初音 HAMADA, Hatsune; JP
中島 成 NAKASHIMA, Nari; JP
坂元 辰哉 SAKAMOTO, Tatsuya; JP
辻岡 将昭 TSUJIOKA, Masaaki; JP
井上 和真 INOUE, Kazuma; JP
Priority Data:
(JA) 電力増幅器
(EN) The present invention is provided with a distortion compensation circuit (5) that amplifies the amplitude of a differential frequency component which is a component of a frequency difference fd between a first frequency f1 and a second frequency fh which are included in a first amplification signal output by a first amplifier (3), and that shifts the phase of the differential frequency component and applies the amplified and phase-shifted differential frequency component to an output terminal (4a) of a second amplifier (4), wherein a synthesis circuit (13) is configured to synthesize the first amplification signal output by the first amplifier (3) and a signal appearing at the output terminal (4a) of the second amplifier (4).
(FR) La présente invention concerne un circuit de compensation de distorsion (5) destiné à amplifier l'amplitude d'une composante de fréquence différentielle qui est une composante d'une différence de fréquence (fd) entre une première fréquence (f1) et une seconde fréquence (fh) qui sont comprises dans un premier signal d'amplification émis par un premier amplificateur (3), et à décaler la phase de la composante de fréquence différentielle et à appliquer la composante de fréquence différentielle amplifiée et déphasée à une borne de sortie (4a) d'un second amplificateur (4), un circuit de synthèse (13) étant configuré pour synthétiser le premier signal d'amplification émis par le premier amplificateur (3) et un signal apparaissant au niveau de la borne de sortie (4a) du second amplificateur (4).
(JA) 第1の増幅器(3)から出力された第1の増幅信号に含まれている第1の周波数flと第2の周波数fhとの差分の周波数fdの成分である差分周波数成分の振幅を増幅するとともに、差分周波数成分の位相を移相し、増幅及び移相後の差分周波数成分を第2の増幅器(4)の出力端子(4a)に与える歪補償回路(5)を設け、合成回路(13)が、第1の増幅器(3)から出力された第1の増幅信号と、第2の増幅器(4)の出力端子(4a)に現れている信号とを合成するように構成する。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)